1 /* 2 * Copyright (C) 2014 Gateworks Corporation 3 * Author: Tim Harvey <tharvey@gateworks.com> 4 * 5 * SPDX-License-Identifier: GPL-2.0+ 6 */ 7 #ifndef __IMX6_SPL_CONFIG_H 8 #define __IMX6_SPL_CONFIG_H 9 10 #ifdef CONFIG_SPL 11 12 #define CONFIG_SPL_FRAMEWORK 13 14 /* 15 * see Figure 8-3 in IMX6DQ/IMX6SDL Reference manuals: 16 * - IMX6SDL OCRAM (IRAM) is from 0x00907000 to 0x0091FFFF 17 * - IMX6DQ has 2x IRAM of IMX6SDL but we intend to support IMX6SDL as well 18 * - BOOT ROM stack is at 0x0091FFB8 19 * - if icache/dcache is enabled (eFuse/strapping controlled) then the 20 * IMX BOOT ROM will setup MMU table at 0x00918000, therefore we need to 21 * fit between 0x00907000 and 0x00918000. 22 * - Additionally the BOOT ROM loads what they consider the firmware image 23 * which consists of a 4K header in front of us that contains the IVT, DCD 24 * and some padding thus 'our' max size is really 0x00908000 - 0x00918000 25 * or 64KB 26 */ 27 #define CONFIG_SPL_LDSCRIPT "arch/arm/mach-omap2/u-boot-spl.lds" 28 #define CONFIG_SPL_TEXT_BASE 0x00908000 29 #define CONFIG_SPL_MAX_SIZE 0x10000 30 #define CONFIG_SPL_STACK 0x0091FFB8 31 /* 32 * Pad SPL to 68KB (4KB header + 64KB max size). This allows to write the 33 * SPL/U-Boot combination generated with u-boot-with-spl.imx directly to a 34 * boot media (given that boot media specific offset is configured properly). 35 */ 36 #define CONFIG_SPL_PAD_TO 0x11000 37 38 /* MMC support */ 39 #if defined(CONFIG_SPL_MMC_SUPPORT) 40 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 41 #define CONFIG_SYS_MONITOR_LEN 409600 /* 400 KB */ 42 #endif 43 44 /* SATA support */ 45 #if defined(CONFIG_SPL_SATA_SUPPORT) 46 #define CONFIG_SPL_SATA_BOOT_DEVICE 0 47 #define CONFIG_SYS_SATA_FAT_BOOT_PARTITION 1 48 #endif 49 50 /* Define the payload for FAT/EXT support */ 51 #if defined(CONFIG_SPL_FAT_SUPPORT) || defined(CONFIG_SPL_EXT_SUPPORT) 52 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 53 #endif 54 55 #if defined(CONFIG_MX6SX) || defined(CONFIG_MX6UL) || defined(CONFIG_MX6SL) 56 #define CONFIG_SPL_BSS_START_ADDR 0x88200000 57 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ 58 #define CONFIG_SYS_SPL_MALLOC_START 0x88300000 59 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 60 #define CONFIG_SYS_TEXT_BASE 0x87800000 61 #else 62 #define CONFIG_SPL_BSS_START_ADDR 0x18200000 63 #define CONFIG_SPL_BSS_MAX_SIZE 0x100000 /* 1 MB */ 64 #define CONFIG_SYS_SPL_MALLOC_START 0x18300000 65 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 66 #define CONFIG_SYS_TEXT_BASE 0x17800000 67 #endif 68 #endif 69 70 #endif 71