1 /*
2  * Copyright (C) 2016 Amarula Solutions B.V.
3  * Copyright (C) 2016 Engicam S.r.l.
4  *
5  * Configuration settings for the Engicam i.MX6 SOM Starter Kits.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __IMX6_ENGICAM_CONFIG_H
11 #define __IMX6_ENGICAM_CONFIG_H
12 
13 #include <linux/sizes.h>
14 #include "mx6_common.h"
15 
16 /* Size of malloc() pool */
17 #define CONFIG_SYS_MALLOC_LEN		(16 * SZ_1M)
18 
19 /* Total Size of Environment Sector */
20 #define CONFIG_ENV_SIZE			SZ_128K
21 
22 /* Allow to overwrite serial and ethaddr */
23 #define CONFIG_ENV_OVERWRITE
24 
25 /* Environment */
26 #ifndef CONFIG_ENV_IS_NOWHERE
27 /* Environment in MMC */
28 # if defined(CONFIG_ENV_IS_IN_MMC)
29 #  define CONFIG_ENV_OFFSET		0x100000
30 /* Environment in NAND */
31 # elif defined(CONFIG_ENV_IS_IN_NAND)
32 #  define CONFIG_ENV_OFFSET		0x400000
33 #  define CONFIG_ENV_SECT_SIZE		CONFIG_ENV_SIZE
34 # endif
35 #endif
36 
37 /* Default environment */
38 #define CONFIG_EXTRA_ENV_SETTINGS \
39 	"script=boot.scr\0" \
40 	"splashpos=m,m\0" \
41 	"image=uImage\0" \
42 	"fit_image=fit.itb\0" \
43 	"fdt_high=0xffffffff\0" \
44 	"fdt_addr=" FDT_ADDR "\0" \
45 	"boot_fdt=try\0" \
46 	"mmcpart=1\0" \
47 	"nandroot=ubi0:rootfs rootfstype=ubifs\0" \
48 	"mmcautodetect=yes\0" \
49 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
50 		"root=${mmcroot}\0" \
51 	"ubiargs=setenv bootargs console=${console},${baudrate} " \
52 		"ubi.mtd=5 root=${nandroot} ${mtdparts}\0" \
53 	"loadbootscript=" \
54 		"fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
55 	"bootscript=echo Running bootscript from mmc ...; " \
56 		"source\0" \
57 	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
58 	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
59 	"loadfit=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${fit_image}\0" \
60 	"fitboot=echo Booting FIT image from mmc ...; " \
61 		"run mmcargs; " \
62 		"bootm ${loadaddr}\0" \
63 	"_mmcboot=run mmcargs; " \
64 		"run mmcargs; " \
65 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
66 			"if run loadfdt; then " \
67 				"bootm ${loadaddr} - ${fdt_addr}; " \
68 			"else " \
69 				"if test ${boot_fdt} = try; then " \
70 					"bootm; " \
71 				"else " \
72 					"echo WARN: Cannot load the DT; " \
73 				"fi; " \
74 			"fi; " \
75 		"else " \
76 			"bootm; " \
77 		"fi\0" \
78 	"mmcboot=echo Booting from mmc ...; " \
79 		"if mmc rescan; then " \
80 			"if run loadbootscript; then " \
81 				"run bootscript; " \
82 			"else " \
83 				"if run loadfit; then " \
84 					"run fitboot; " \
85 				"else " \
86 					"if run loadimage; then " \
87 						"run _mmcboot; " \
88 					"fi; " \
89 				"fi; " \
90 			"fi; " \
91 		"fi\0" \
92 	"nandboot=echo Booting from nand ...; " \
93 		"if mtdparts; then " \
94 			"echo Starting nand boot ...; " \
95 		"else " \
96 			"mtdparts default; " \
97 		"fi; " \
98 		"run ubiargs; " \
99 		"nand read ${loadaddr} kernel 0x800000; " \
100 		"nand read ${fdt_addr} dtb 0x100000; " \
101 		"bootm ${loadaddr} - ${fdt_addr}\0"
102 
103 #define CONFIG_BOOTCOMMAND		"run $modeboot"
104 
105 /* Miscellaneous configurable options */
106 #define CONFIG_SYS_MEMTEST_START	0x80000000
107 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + 0x8000000)
108 
109 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
110 #define CONFIG_SYS_HZ			1000
111 
112 #ifdef CONFIG_MX6UL
113 # define DRAM_OFFSET(x)			0x87##x
114 # define FDT_ADDR			__stringify(DRAM_OFFSET(800000))
115 #else
116 # define DRAM_OFFSET(x)			0x1##x
117 # define FDT_ADDR			__stringify(DRAM_OFFSET(8000000))
118 #endif
119 
120 /* Physical Memory Map */
121 #define CONFIG_NR_DRAM_BANKS		1
122 #define PHYS_SDRAM			MMDC0_ARB_BASE_ADDR
123 
124 #define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM
125 #define CONFIG_SYS_INIT_RAM_ADDR	IRAM_BASE_ADDR
126 #define CONFIG_SYS_INIT_RAM_SIZE	IRAM_SIZE
127 
128 #define CONFIG_SYS_INIT_SP_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
129 					GENERATED_GBL_DATA_SIZE)
130 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
131 					CONFIG_SYS_INIT_SP_OFFSET)
132 
133 /* FIT */
134 #ifdef CONFIG_FIT
135 # define CONFIG_IMAGE_FORMAT_LEGACY
136 #endif
137 
138 /* UART */
139 #ifdef CONFIG_MXC_UART
140 # ifdef CONFIG_MX6UL
141 #  define CONFIG_MXC_UART_BASE		UART1_BASE
142 # else
143 #  define CONFIG_MXC_UART_BASE		UART4_BASE
144 # endif
145 #endif
146 
147 /* MMC */
148 #ifdef CONFIG_FSL_USDHC
149 # define CONFIG_SYS_MMC_ENV_DEV		0
150 #endif
151 
152 /* NAND */
153 #ifdef CONFIG_NAND_MXS
154 # define CONFIG_SYS_MAX_NAND_DEVICE	1
155 # define CONFIG_SYS_NAND_BASE		0x40000000
156 # define CONFIG_SYS_NAND_5_ADDR_CYCLE
157 # define CONFIG_SYS_NAND_ONFI_DETECTION
158 # define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
159 # define CONFIG_SYS_NAND_U_BOOT_OFFS	0x200000
160 
161 /* MTD device */
162 # define CONFIG_MTD_DEVICE
163 # define CONFIG_MTD_PARTITIONS
164 # define MTDIDS_DEFAULT			"nand0=gpmi-nand"
165 # define MTDPARTS_DEFAULT		"mtdparts=gpmi-nand:2m(spl),2m(uboot)," \
166 					"1m(env),8m(kernel),1m(dtb),-(rootfs)"
167 
168 # define CONFIG_APBH_DMA
169 # define CONFIG_APBH_DMA_BURST
170 # define CONFIG_APBH_DMA_BURST8
171 #endif
172 
173 /* Ethernet */
174 #ifdef CONFIG_FEC_MXC
175 # ifdef CONFIG_TARGET_MX6Q_ICORE_RQS
176 #  define CONFIG_FEC_MXC_PHYADDR	3
177 #  define CONFIG_FEC_XCV_TYPE		RGMII
178 # else
179 #  define CONFIG_FEC_MXC_PHYADDR	0
180 #  define CONFIG_FEC_XCV_TYPE		RMII
181 # endif
182 
183 # define CONFIG_MII
184 #endif
185 
186 /* Falcon Mode */
187 #ifdef CONFIG_SPL_OS_BOOT
188 # define CONFIG_SPL_FS_LOAD_ARGS_NAME	"args"
189 # define CONFIG_SPL_FS_LOAD_KERNEL_NAME	"uImage"
190 # define CONFIG_CMD_SPL
191 # define CONFIG_SYS_SPL_ARGS_ADDR	0x18000000
192 # define CONFIG_CMD_SPL_WRITE_SIZE	(128 * SZ_1K)
193 
194 /* MMC support: args@1MB kernel@2MB */
195 # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR		0x800   /* 1MB */
196 # define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS		(CONFIG_CMD_SPL_WRITE_SIZE / 512)
197 # define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x1000  /* 2MB */
198 #endif
199 
200 /* Framebuffer */
201 #ifdef CONFIG_VIDEO_IPUV3
202 # define CONFIG_IMX_VIDEO_SKIP
203 
204 # define CONFIG_SPLASH_SCREEN
205 # define CONFIG_SPLASH_SCREEN_ALIGN
206 # define CONFIG_BMP_16BPP
207 # define CONFIG_VIDEO_BMP_RLE8
208 # define CONFIG_VIDEO_LOGO
209 # define CONFIG_VIDEO_BMP_LOGO
210 #endif
211 
212 /* SPL */
213 #ifdef CONFIG_SPL
214 # ifdef CONFIG_NAND_MXS
215 #  define CONFIG_SPL_NAND_SUPPORT
216 # else
217 #  define CONFIG_SPL_MMC_SUPPORT
218 # endif
219 
220 # include "imx6_spl.h"
221 # ifdef CONFIG_SPL_BUILD
222 #  if defined(CONFIG_TARGET_MX6Q_ICORE_RQS) || defined(CONFIG_TARGET_MX6UL_ISIOT)
223 #   define CONFIG_SYS_FSL_USDHC_NUM	2
224 #  else
225 #   define CONFIG_SYS_FSL_USDHC_NUM	1
226 #  endif
227 
228 #  define CONFIG_SYS_FSL_ESDHC_ADDR	0
229 #  undef CONFIG_DM_GPIO
230 #  undef CONFIG_DM_MMC
231 # endif
232 #endif
233 
234 #endif /* __IMX6_ENGICAM_CONFIG_H */
235