xref: /openbmc/u-boot/include/configs/highbank.h (revision ddcca730)
1 /*
2  * Copyright 2010-2011 Calxeda, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9 
10 #include <config_distro_defaults.h>
11 
12 #define CONFIG_SYS_DCACHE_OFF
13 
14 #define CONFIG_SYS_BOOTMAPSZ		(16 << 20)
15 
16 #define CONFIG_SYS_TIMER_RATE		(150000000/256)
17 #define CONFIG_SYS_TIMER_COUNTER	(0xFFF34000 + 0x4)
18 #define CONFIG_SYS_TIMER_COUNTS_DOWN
19 
20 /*
21  * Size of malloc() pool
22  */
23 #define CONFIG_SYS_MALLOC_LEN		(512 * 1024)
24 
25 #define CONFIG_PL011_SERIAL
26 #define CONFIG_PL011_CLOCK		150000000
27 #define CONFIG_PL01x_PORTS		{ (void *)(0xFFF36000) }
28 #define CONFIG_CONS_INDEX		0
29 
30 #define CONFIG_BOOTCOUNT_LIMIT
31 #define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
32 #define CONFIG_SYS_BOOTCOUNT_LE		/* Use little-endian accessors */
33 #define CONFIG_SYS_BOOTCOUNT_ADDR	0xfff3cf0c
34 
35 #define CONFIG_MISC_INIT_R
36 #define CONFIG_SCSI_AHCI_PLAT
37 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	5
38 #define CONFIG_SYS_SCSI_MAX_LUN		1
39 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
40 					CONFIG_SYS_SCSI_MAX_LUN)
41 
42 #define CONFIG_CALXEDA_XGMAC
43 
44 /*
45  * Command line configuration.
46  */
47 
48 #define CONFIG_BOOT_RETRY_TIME		-1
49 #define CONFIG_RESET_TO_RETRY
50 
51 /*
52  * Miscellaneous configurable options
53  */
54 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
55 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
56 
57 #define CONFIG_SYS_LOAD_ADDR		0x800000
58 #define CONFIG_SYS_64BIT_LBA
59 
60 /*-----------------------------------------------------------------------
61  * Physical Memory Map
62  * The DRAM is already setup, so do not touch the DT node later.
63  */
64 #define CONFIG_NR_DRAM_BANKS		0
65 #define PHYS_SDRAM_1_SIZE		(4089 << 20)
66 #define CONFIG_SYS_MEMTEST_START	0x100000
67 #define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_1_SIZE - 0x100000)
68 
69 /* Environment data setup
70 */
71 #define CONFIG_SYS_NVRAM_BASE_ADDR	0xfff88000	/* NVRAM base address */
72 #define CONFIG_SYS_NVRAM_SIZE		0x8000		/* NVRAM size */
73 #define CONFIG_ENV_SIZE			0x2000		/* Size of Environ */
74 #define CONFIG_ENV_ADDR			CONFIG_SYS_NVRAM_BASE_ADDR
75 
76 #define CONFIG_SYS_SDRAM_BASE		0x00000000
77 #define CONFIG_SYS_TEXT_BASE		0x00008000
78 #define CONFIG_SYS_INIT_SP_ADDR		0x01000000
79 #define CONFIG_SKIP_LOWLEVEL_INIT
80 
81 #endif
82