1 /* 2 * Copyright 2010-2011 Calxeda, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 #include <config_distro_defaults.h> 11 12 #define CONFIG_SYS_DCACHE_OFF 13 #define CONFIG_SYS_THUMB_BUILD 14 15 #define CONFIG_SYS_NO_FLASH 16 17 #define CONFIG_OF_BOARD_SETUP 18 #define CONFIG_FIT 19 #define CONFIG_SYS_BOOTMAPSZ (16 << 20) 20 21 #define CONFIG_SYS_TIMER_RATE (150000000/256) 22 #define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4) 23 #define CONFIG_SYS_TIMER_COUNTS_DOWN 24 25 /* 26 * Size of malloc() pool 27 */ 28 #define CONFIG_SYS_MALLOC_LEN (512 * 1024) 29 30 #define CONFIG_PL011_SERIAL 31 #define CONFIG_PL011_CLOCK 150000000 32 #define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) } 33 #define CONFIG_CONS_INDEX 0 34 35 #define CONFIG_BAUDRATE 115200 36 37 #define CONFIG_BOOTCOUNT_LIMIT 38 #define CONFIG_SYS_BOOTCOUNT_SINGLEWORD 39 #define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ 40 #define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c 41 42 #define CONFIG_MISC_INIT_R 43 #define CONFIG_LIBATA 44 #define CONFIG_SCSI_AHCI 45 #define CONFIG_SCSI_AHCI_PLAT 46 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 5 47 #define CONFIG_SYS_SCSI_MAX_LUN 1 48 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 49 CONFIG_SYS_SCSI_MAX_LUN) 50 51 #define CONFIG_CALXEDA_XGMAC 52 53 /* 54 * Command line configuration. 55 */ 56 #define CONFIG_CMD_SCSI 57 58 #define CONFIG_BOOT_RETRY_TIME -1 59 #define CONFIG_RESET_TO_RETRY 60 61 /* 62 * Miscellaneous configurable options 63 */ 64 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 65 #define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */ 66 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 67 /* Print Buffer Size */ 68 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 69 sizeof(CONFIG_SYS_PROMPT)+16) 70 71 #define CONFIG_SYS_LOAD_ADDR 0x800000 72 #define CONFIG_SYS_64BIT_LBA 73 74 75 /*----------------------------------------------------------------------- 76 * Physical Memory Map 77 * The DRAM is already setup, so do not touch the DT node later. 78 */ 79 #define CONFIG_NR_DRAM_BANKS 0 80 #define PHYS_SDRAM_1_SIZE (4089 << 20) 81 #define CONFIG_SYS_MEMTEST_START 0x100000 82 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000) 83 84 /* Environment data setup 85 */ 86 #define CONFIG_ENV_IS_IN_NVRAM 87 #define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */ 88 #define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */ 89 #define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */ 90 #define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR 91 92 #define CONFIG_SYS_SDRAM_BASE 0x00000000 93 #define CONFIG_SYS_TEXT_BASE 0x00008000 94 #define CONFIG_SYS_INIT_SP_ADDR 0x01000000 95 #define CONFIG_SKIP_LOWLEVEL_INIT 96 97 #endif 98