1 /* 2 * Copyright 2010-2011 Calxeda, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 #include <config_distro_defaults.h> 11 12 #define CONFIG_SYS_DCACHE_OFF 13 14 #define CONFIG_SYS_BOOTMAPSZ (16 << 20) 15 16 #define CONFIG_SYS_TIMER_RATE (150000000/256) 17 #define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4) 18 #define CONFIG_SYS_TIMER_COUNTS_DOWN 19 20 /* 21 * Size of malloc() pool 22 */ 23 #define CONFIG_SYS_MALLOC_LEN (512 * 1024) 24 25 #define CONFIG_PL011_CLOCK 150000000 26 #define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) } 27 #define CONFIG_CONS_INDEX 0 28 29 #define CONFIG_BOOTCOUNT_LIMIT 30 #define CONFIG_SYS_BOOTCOUNT_SINGLEWORD 31 #define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ 32 #define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c 33 34 #define CONFIG_MISC_INIT_R 35 #define CONFIG_SCSI_AHCI_PLAT 36 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 5 37 #define CONFIG_SYS_SCSI_MAX_LUN 1 38 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 39 CONFIG_SYS_SCSI_MAX_LUN) 40 41 #define CONFIG_CALXEDA_XGMAC 42 43 /* 44 * Command line configuration. 45 */ 46 47 #define CONFIG_BOOT_RETRY_TIME -1 48 #define CONFIG_RESET_TO_RETRY 49 50 /* 51 * Miscellaneous configurable options 52 */ 53 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 54 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 55 56 #define CONFIG_SYS_LOAD_ADDR 0x800000 57 #define CONFIG_SYS_64BIT_LBA 58 59 /*----------------------------------------------------------------------- 60 * Physical Memory Map 61 * The DRAM is already setup, so do not touch the DT node later. 62 */ 63 #define CONFIG_NR_DRAM_BANKS 0 64 #define PHYS_SDRAM_1_SIZE (4089 << 20) 65 #define CONFIG_SYS_MEMTEST_START 0x100000 66 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000) 67 68 /* Environment data setup 69 */ 70 #define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */ 71 #define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */ 72 #define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */ 73 #define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR 74 75 #define CONFIG_SYS_SDRAM_BASE 0x00000000 76 #define CONFIG_SYS_TEXT_BASE 0x00008000 77 #define CONFIG_SYS_INIT_SP_ADDR 0x01000000 78 #define CONFIG_SKIP_LOWLEVEL_INIT 79 80 #endif 81