1 /* 2 * Copyright 2010-2011 Calxeda, Inc. 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 #include <config_distro_defaults.h> 11 12 #define CONFIG_SYS_DCACHE_OFF 13 #define CONFIG_SYS_THUMB_BUILD 14 15 #define CONFIG_SYS_NO_FLASH 16 17 #define CONFIG_SYS_BOOTMAPSZ (16 << 20) 18 19 #define CONFIG_SYS_TIMER_RATE (150000000/256) 20 #define CONFIG_SYS_TIMER_COUNTER (0xFFF34000 + 0x4) 21 #define CONFIG_SYS_TIMER_COUNTS_DOWN 22 23 /* 24 * Size of malloc() pool 25 */ 26 #define CONFIG_SYS_MALLOC_LEN (512 * 1024) 27 28 #define CONFIG_PL011_SERIAL 29 #define CONFIG_PL011_CLOCK 150000000 30 #define CONFIG_PL01x_PORTS { (void *)(0xFFF36000) } 31 #define CONFIG_CONS_INDEX 0 32 33 #define CONFIG_BAUDRATE 115200 34 35 #define CONFIG_BOOTCOUNT_LIMIT 36 #define CONFIG_SYS_BOOTCOUNT_SINGLEWORD 37 #define CONFIG_SYS_BOOTCOUNT_LE /* Use little-endian accessors */ 38 #define CONFIG_SYS_BOOTCOUNT_ADDR 0xfff3cf0c 39 40 #define CONFIG_MISC_INIT_R 41 #define CONFIG_LIBATA 42 #define CONFIG_SCSI_AHCI 43 #define CONFIG_SCSI_AHCI_PLAT 44 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 5 45 #define CONFIG_SYS_SCSI_MAX_LUN 1 46 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 47 CONFIG_SYS_SCSI_MAX_LUN) 48 49 #define CONFIG_CALXEDA_XGMAC 50 51 /* 52 * Command line configuration. 53 */ 54 #define CONFIG_CMD_SCSI 55 56 #define CONFIG_BOOT_RETRY_TIME -1 57 #define CONFIG_RESET_TO_RETRY 58 59 /* 60 * Miscellaneous configurable options 61 */ 62 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 63 #define CONFIG_SYS_MAXARGS 16 /* max number of cmd args */ 64 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 65 /* Print Buffer Size */ 66 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \ 67 sizeof(CONFIG_SYS_PROMPT)+16) 68 69 #define CONFIG_SYS_LOAD_ADDR 0x800000 70 #define CONFIG_SYS_64BIT_LBA 71 72 73 /*----------------------------------------------------------------------- 74 * Physical Memory Map 75 * The DRAM is already setup, so do not touch the DT node later. 76 */ 77 #define CONFIG_NR_DRAM_BANKS 0 78 #define PHYS_SDRAM_1_SIZE (4089 << 20) 79 #define CONFIG_SYS_MEMTEST_START 0x100000 80 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1_SIZE - 0x100000) 81 82 /* Environment data setup 83 */ 84 #define CONFIG_ENV_IS_IN_NVRAM 85 #define CONFIG_SYS_NVRAM_BASE_ADDR 0xfff88000 /* NVRAM base address */ 86 #define CONFIG_SYS_NVRAM_SIZE 0x8000 /* NVRAM size */ 87 #define CONFIG_ENV_SIZE 0x2000 /* Size of Environ */ 88 #define CONFIG_ENV_ADDR CONFIG_SYS_NVRAM_BASE_ADDR 89 90 #define CONFIG_SYS_SDRAM_BASE 0x00000000 91 #define CONFIG_SYS_TEXT_BASE 0x00008000 92 #define CONFIG_SYS_INIT_SP_ADDR 0x01000000 93 #define CONFIG_SKIP_LOWLEVEL_INIT 94 95 #endif 96