xref: /openbmc/u-boot/include/configs/highbank.h (revision 28522678)
1 /*
2  * Copyright 2010-2011 Calxeda, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9 
10 #include <config_distro_defaults.h>
11 
12 #define CONFIG_SYS_DCACHE_OFF
13 #define CONFIG_SYS_THUMB_BUILD
14 
15 #define CONFIG_SYS_BOOTMAPSZ		(16 << 20)
16 
17 #define CONFIG_SYS_TIMER_RATE		(150000000/256)
18 #define CONFIG_SYS_TIMER_COUNTER	(0xFFF34000 + 0x4)
19 #define CONFIG_SYS_TIMER_COUNTS_DOWN
20 
21 /*
22  * Size of malloc() pool
23  */
24 #define CONFIG_SYS_MALLOC_LEN		(512 * 1024)
25 
26 #define CONFIG_PL011_SERIAL
27 #define CONFIG_PL011_CLOCK		150000000
28 #define CONFIG_PL01x_PORTS		{ (void *)(0xFFF36000) }
29 #define CONFIG_CONS_INDEX		0
30 
31 #define CONFIG_BAUDRATE			115200
32 
33 #define CONFIG_BOOTCOUNT_LIMIT
34 #define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
35 #define CONFIG_SYS_BOOTCOUNT_LE		/* Use little-endian accessors */
36 #define CONFIG_SYS_BOOTCOUNT_ADDR	0xfff3cf0c
37 
38 #define CONFIG_MISC_INIT_R
39 #define CONFIG_LIBATA
40 #define CONFIG_SCSI_AHCI
41 #define CONFIG_SCSI_AHCI_PLAT
42 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	5
43 #define CONFIG_SYS_SCSI_MAX_LUN		1
44 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
45 					CONFIG_SYS_SCSI_MAX_LUN)
46 
47 #define CONFIG_CALXEDA_XGMAC
48 
49 /*
50  * Command line configuration.
51  */
52 #define CONFIG_SCSI
53 
54 #define CONFIG_BOOT_RETRY_TIME		-1
55 #define CONFIG_RESET_TO_RETRY
56 
57 /*
58  * Miscellaneous configurable options
59  */
60 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
61 #define CONFIG_SYS_MAXARGS		16	/* max number of cmd args */
62 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
63 /* Print Buffer Size */
64 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
65 					 sizeof(CONFIG_SYS_PROMPT)+16)
66 
67 #define CONFIG_SYS_LOAD_ADDR		0x800000
68 #define CONFIG_SYS_64BIT_LBA
69 
70 /*-----------------------------------------------------------------------
71  * Physical Memory Map
72  * The DRAM is already setup, so do not touch the DT node later.
73  */
74 #define CONFIG_NR_DRAM_BANKS		0
75 #define PHYS_SDRAM_1_SIZE		(4089 << 20)
76 #define CONFIG_SYS_MEMTEST_START	0x100000
77 #define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_1_SIZE - 0x100000)
78 
79 /* Environment data setup
80 */
81 #define CONFIG_ENV_IS_IN_NVRAM
82 #define CONFIG_SYS_NVRAM_BASE_ADDR	0xfff88000	/* NVRAM base address */
83 #define CONFIG_SYS_NVRAM_SIZE		0x8000		/* NVRAM size */
84 #define CONFIG_ENV_SIZE			0x2000		/* Size of Environ */
85 #define CONFIG_ENV_ADDR			CONFIG_SYS_NVRAM_BASE_ADDR
86 
87 #define CONFIG_SYS_SDRAM_BASE		0x00000000
88 #define CONFIG_SYS_TEXT_BASE		0x00008000
89 #define CONFIG_SYS_INIT_SP_ADDR		0x01000000
90 #define CONFIG_SKIP_LOWLEVEL_INIT
91 
92 #endif
93