xref: /openbmc/u-boot/include/configs/highbank.h (revision 0649cd0d)
1 /*
2  * Copyright 2010-2011 Calxeda, Inc.
3  *
4  * SPDX-License-Identifier:	GPL-2.0+
5  */
6 
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9 
10 #include <config_distro_defaults.h>
11 
12 #define CONFIG_SYS_DCACHE_OFF
13 
14 #define CONFIG_SYS_BOOTMAPSZ		(16 << 20)
15 
16 #define CONFIG_SYS_TIMER_RATE		(150000000/256)
17 #define CONFIG_SYS_TIMER_COUNTER	(0xFFF34000 + 0x4)
18 #define CONFIG_SYS_TIMER_COUNTS_DOWN
19 
20 /*
21  * Size of malloc() pool
22  */
23 #define CONFIG_SYS_MALLOC_LEN		(512 * 1024)
24 
25 #define CONFIG_PL011_SERIAL
26 #define CONFIG_PL011_CLOCK		150000000
27 #define CONFIG_PL01x_PORTS		{ (void *)(0xFFF36000) }
28 #define CONFIG_CONS_INDEX		0
29 
30 #define CONFIG_BOOTCOUNT_LIMIT
31 #define CONFIG_SYS_BOOTCOUNT_SINGLEWORD
32 #define CONFIG_SYS_BOOTCOUNT_LE		/* Use little-endian accessors */
33 #define CONFIG_SYS_BOOTCOUNT_ADDR	0xfff3cf0c
34 
35 #define CONFIG_MISC_INIT_R
36 #define CONFIG_LIBATA
37 #define CONFIG_SCSI_AHCI
38 #define CONFIG_SCSI_AHCI_PLAT
39 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	5
40 #define CONFIG_SYS_SCSI_MAX_LUN		1
41 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
42 					CONFIG_SYS_SCSI_MAX_LUN)
43 
44 #define CONFIG_CALXEDA_XGMAC
45 
46 /*
47  * Command line configuration.
48  */
49 
50 #define CONFIG_BOOT_RETRY_TIME		-1
51 #define CONFIG_RESET_TO_RETRY
52 
53 /*
54  * Miscellaneous configurable options
55  */
56 #define CONFIG_SYS_CBSIZE		1024	/* Console I/O Buffer Size */
57 #define CONFIG_SYS_MAXARGS		16	/* max number of cmd args */
58 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
59 /* Print Buffer Size */
60 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + \
61 					 sizeof(CONFIG_SYS_PROMPT)+16)
62 
63 #define CONFIG_SYS_LOAD_ADDR		0x800000
64 #define CONFIG_SYS_64BIT_LBA
65 
66 /*-----------------------------------------------------------------------
67  * Physical Memory Map
68  * The DRAM is already setup, so do not touch the DT node later.
69  */
70 #define CONFIG_NR_DRAM_BANKS		0
71 #define PHYS_SDRAM_1_SIZE		(4089 << 20)
72 #define CONFIG_SYS_MEMTEST_START	0x100000
73 #define CONFIG_SYS_MEMTEST_END		(PHYS_SDRAM_1_SIZE - 0x100000)
74 
75 /* Environment data setup
76 */
77 #define CONFIG_SYS_NVRAM_BASE_ADDR	0xfff88000	/* NVRAM base address */
78 #define CONFIG_SYS_NVRAM_SIZE		0x8000		/* NVRAM size */
79 #define CONFIG_ENV_SIZE			0x2000		/* Size of Environ */
80 #define CONFIG_ENV_ADDR			CONFIG_SYS_NVRAM_BASE_ADDR
81 
82 #define CONFIG_SYS_SDRAM_BASE		0x00000000
83 #define CONFIG_SYS_TEXT_BASE		0x00008000
84 #define CONFIG_SYS_INIT_SP_ADDR		0x01000000
85 #define CONFIG_SKIP_LOWLEVEL_INIT
86 
87 #endif
88