1efc05ae1STom Warren /* 2f3d93309SStephen Warren * (C) Copyright 2010-2012 3efc05ae1STom Warren * NVIDIA Corporation <www.nvidia.com> 4efc05ae1STom Warren * 51a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 6efc05ae1STom Warren */ 7efc05ae1STom Warren 8efc05ae1STom Warren #ifndef __CONFIG_H 9efc05ae1STom Warren #define __CONFIG_H 10efc05ae1STom Warren 11*1ace4022SAlexey Brodkin #include <linux/sizes.h> 1200a2749dSAllen Martin #include "tegra20-common.h" 13efc05ae1STom Warren 14f3d93309SStephen Warren /* Enable fdt support for Harmony. Flash the image in u-boot-dtb.bin */ 1500a2749dSAllen Martin #define CONFIG_DEFAULT_DEVICE_TREE tegra20-harmony 16f3d93309SStephen Warren #define CONFIG_OF_CONTROL 17f3d93309SStephen Warren #define CONFIG_OF_SEPARATE 18f3d93309SStephen Warren 19efc05ae1STom Warren /* High-level configuration options */ 2000a2749dSAllen Martin #define V_PROMPT "Tegra20 (Harmony) # " 2129f3e3f2STom Warren #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Harmony" 22efc05ae1STom Warren 23efc05ae1STom Warren /* Board-specific serial config */ 2429f3e3f2STom Warren #define CONFIG_TEGRA_ENABLE_UARTD 25efc05ae1STom Warren 26efc05ae1STom Warren /* UARTD: keyboard satellite board UART, default */ 27efc05ae1STom Warren #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE 2829f3e3f2STom Warren #ifdef CONFIG_TEGRA_ENABLE_UARTA 29efc05ae1STom Warren /* UARTA: debug board UART */ 30efc05ae1STom Warren #define CONFIG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE 31efc05ae1STom Warren #endif 32efc05ae1STom Warren 33efc05ae1STom Warren #define CONFIG_MACH_TYPE MACH_TYPE_HARMONY 34efc05ae1STom Warren 3574652cf6STom Warren #define CONFIG_BOARD_EARLY_INIT_F 36b46694dfSStephen Warren #define CONFIG_BOARD_LATE_INIT /* Make sure LCD init is complete */ 3783800959STom Warren 3883800959STom Warren /* SD/MMC */ 3983800959STom Warren #define CONFIG_MMC 4083800959STom Warren #define CONFIG_GENERIC_MMC 413f82d89dSTom Warren #define CONFIG_TEGRA_MMC 4283800959STom Warren #define CONFIG_CMD_MMC 4383800959STom Warren 449614a1e9SStephen Warren /* NAND support */ 459614a1e9SStephen Warren #define CONFIG_CMD_NAND 469614a1e9SStephen Warren #define CONFIG_TEGRA_NAND 479614a1e9SStephen Warren #define CONFIG_SYS_MAX_NAND_DEVICE 1 489614a1e9SStephen Warren 499614a1e9SStephen Warren /* Environment in NAND (which is 512M), aligned to start of last sector */ 509614a1e9SStephen Warren #define CONFIG_ENV_IS_IN_NAND 519614a1e9SStephen Warren #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sector size */ 52bea2674cSStephen Warren 53f3d93309SStephen Warren /* USB Host support */ 54699c40e8SStephen Warren #define CONFIG_USB_MAX_CONTROLLER_COUNT 3 55f3d93309SStephen Warren #define CONFIG_USB_EHCI 56f3d93309SStephen Warren #define CONFIG_USB_EHCI_TEGRA 57699c40e8SStephen Warren #define CONFIG_USB_ULPI 58699c40e8SStephen Warren #define CONFIG_USB_ULPI_VIEWPORT 59f3d93309SStephen Warren #define CONFIG_USB_STORAGE 60f3d93309SStephen Warren #define CONFIG_CMD_USB 61f3d93309SStephen Warren 62f3d93309SStephen Warren /* USB networking support */ 63f3d93309SStephen Warren #define CONFIG_USB_HOST_ETHER 64f3d93309SStephen Warren #define CONFIG_USB_ETHER_SMSC95XX 65f3d93309SStephen Warren #define CONFIG_USB_ETHER_ASIX 66f3d93309SStephen Warren 67f3d93309SStephen Warren /* General networking support */ 68f3d93309SStephen Warren #define CONFIG_CMD_NET 69f3d93309SStephen Warren #define CONFIG_CMD_DHCP 70f3d93309SStephen Warren 71b46694dfSStephen Warren /* LCD support */ 72b46694dfSStephen Warren #define CONFIG_LCD 73b46694dfSStephen Warren #define CONFIG_PWM_TEGRA 74b46694dfSStephen Warren #define CONFIG_VIDEO_TEGRA 75b46694dfSStephen Warren #define LCD_BPP LCD_COLOR16 76b46694dfSStephen Warren #define CONFIG_SYS_WHITE_ON_BLACK 77b46694dfSStephen Warren #define CONFIG_CONSOLE_SCROLL_LINES 10 78b46694dfSStephen Warren 7929f3e3f2STom Warren #include "tegra-common-post.h" 80bea2674cSStephen Warren 81efc05ae1STom Warren #endif /* __CONFIG_H */ 82