1*83d290c5STom Rini /* SPDX-License-Identifier: GPL-2.0+ */ 2efc05ae1STom Warren /* 3f3d93309SStephen Warren * (C) Copyright 2010-2012 4efc05ae1STom Warren * NVIDIA Corporation <www.nvidia.com> 5efc05ae1STom Warren */ 6efc05ae1STom Warren 7efc05ae1STom Warren #ifndef __CONFIG_H 8efc05ae1STom Warren #define __CONFIG_H 9efc05ae1STom Warren 101ace4022SAlexey Brodkin #include <linux/sizes.h> 1100a2749dSAllen Martin #include "tegra20-common.h" 12efc05ae1STom Warren 13efc05ae1STom Warren /* High-level configuration options */ 1429f3e3f2STom Warren #define CONFIG_TEGRA_BOARD_STRING "NVIDIA Harmony" 15efc05ae1STom Warren 16efc05ae1STom Warren /* Board-specific serial config */ 1729f3e3f2STom Warren #define CONFIG_TEGRA_ENABLE_UARTD 18efc05ae1STom Warren 19efc05ae1STom Warren /* UARTD: keyboard satellite board UART, default */ 20efc05ae1STom Warren #define CONFIG_SYS_NS16550_COM1 NV_PA_APB_UARTD_BASE 2129f3e3f2STom Warren #ifdef CONFIG_TEGRA_ENABLE_UARTA 22efc05ae1STom Warren /* UARTA: debug board UART */ 23efc05ae1STom Warren #define CONFIG_SYS_NS16550_COM2 NV_PA_APB_UARTA_BASE 24efc05ae1STom Warren #endif 25efc05ae1STom Warren 26efc05ae1STom Warren #define CONFIG_MACH_TYPE MACH_TYPE_HARMONY 27efc05ae1STom Warren 289614a1e9SStephen Warren /* NAND support */ 299614a1e9SStephen Warren #define CONFIG_TEGRA_NAND 309614a1e9SStephen Warren #define CONFIG_SYS_MAX_NAND_DEVICE 1 319614a1e9SStephen Warren 329614a1e9SStephen Warren /* Environment in NAND (which is 512M), aligned to start of last sector */ 339614a1e9SStephen Warren #define CONFIG_ENV_OFFSET (SZ_512M - SZ_128K) /* 128K sector size */ 34bea2674cSStephen Warren 3529f3e3f2STom Warren #include "tegra-common-post.h" 36bea2674cSStephen Warren 37efc05ae1STom Warren #endif /* __CONFIG_H */ 38