1 /* 2 * Copyright (C) 2013 Gateworks Corporation 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 /* SPL */ 11 #define CONFIG_SPL_BOARD_INIT 12 #define CONFIG_SPL_NAND_SUPPORT 13 #define CONFIG_SPL_MMC_SUPPORT 14 #define CONFIG_SPL_POWER_SUPPORT 15 /* Location in NAND to read U-Boot from */ 16 #define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M) 17 18 /* Falcon Mode */ 19 #define CONFIG_CMD_SPL 20 #define CONFIG_SPL_OS_BOOT 21 #define CONFIG_SPL_ENV_SUPPORT 22 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 23 #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) 24 25 /* Falcon Mode - NAND support: args@17MB kernel@18MB */ 26 #define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M) 27 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M) 28 29 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ 30 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ 31 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) 32 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ 33 34 #include "imx6_spl.h" /* common IMX6 SPL configuration */ 35 #include "mx6_common.h" 36 37 #define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */ 38 39 /* Serial ATAG */ 40 #define CONFIG_SERIAL_TAG 41 42 /* Size of malloc() pool */ 43 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 44 45 /* Init Functions */ 46 #define CONFIG_BOARD_EARLY_INIT_F 47 #define CONFIG_MISC_INIT_R 48 49 /* Driver Model */ 50 #ifndef CONFIG_SPL_BUILD 51 #define CONFIG_DM_GPIO 52 #define CONFIG_DM_THERMAL 53 #endif 54 55 /* GPIO */ 56 #define CONFIG_MXC_GPIO 57 #define CONFIG_CMD_GPIO 58 59 /* Thermal */ 60 #define CONFIG_IMX_THERMAL 61 62 /* Serial */ 63 #define CONFIG_MXC_UART 64 #define CONFIG_MXC_UART_BASE UART2_BASE 65 66 #ifdef CONFIG_SPI_FLASH 67 68 /* SPI */ 69 #define CONFIG_CMD_SF 70 #ifdef CONFIG_CMD_SF 71 #define CONFIG_MXC_SPI 72 #define CONFIG_SPI_FLASH_MTD 73 #define CONFIG_SPI_FLASH_BAR 74 #define CONFIG_SPI_FLASH_WINBOND 75 #define CONFIG_SF_DEFAULT_BUS 0 76 #define CONFIG_SF_DEFAULT_CS 0 77 /* GPIO 3-19 (21248) */ 78 #define CONFIG_SF_DEFAULT_SPEED 30000000 79 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 80 #endif 81 82 #else 83 /* Enable NAND support */ 84 #define CONFIG_CMD_TIME 85 #define CONFIG_CMD_NAND 86 #define CONFIG_CMD_NAND_TRIMFFS 87 #ifdef CONFIG_CMD_NAND 88 #define CONFIG_NAND_MXS 89 #define CONFIG_SYS_MAX_NAND_DEVICE 1 90 #define CONFIG_SYS_NAND_BASE 0x40000000 91 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 92 #define CONFIG_SYS_NAND_ONFI_DETECTION 93 94 /* DMA stuff, needed for GPMI/MXS NAND support */ 95 #define CONFIG_APBH_DMA 96 #define CONFIG_APBH_DMA_BURST 97 #define CONFIG_APBH_DMA_BURST8 98 #endif 99 100 #endif /* CONFIG_SPI_FLASH */ 101 102 /* Flattened Image Tree Suport */ 103 #define CONFIG_FIT 104 #define CONFIG_FIT_VERBOSE 105 106 /* I2C Configs */ 107 #define CONFIG_CMD_I2C 108 #define CONFIG_SYS_I2C 109 #define CONFIG_SYS_I2C_MXC 110 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 111 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 112 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 113 #define CONFIG_SYS_I2C_SPEED 100000 114 #define CONFIG_I2C_GSC 0 115 #define CONFIG_I2C_PMIC 1 116 #define CONFIG_I2C_EDID 117 118 /* MMC Configs */ 119 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 120 #define CONFIG_SYS_FSL_USDHC_NUM 1 121 122 /* Filesystem support */ 123 #define CONFIG_CMD_UBIFS 124 125 /* 126 * SATA Configs 127 */ 128 #define CONFIG_CMD_SATA 129 #ifdef CONFIG_CMD_SATA 130 #define CONFIG_DWC_AHSATA 131 #define CONFIG_SYS_SATA_MAX_DEVICE 1 132 #define CONFIG_DWC_AHSATA_PORT_ID 0 133 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 134 #define CONFIG_LBA48 135 #define CONFIG_LIBATA 136 #endif 137 138 /* 139 * PCI express 140 */ 141 #define CONFIG_CMD_PCI 142 #ifdef CONFIG_CMD_PCI 143 #define CONFIG_PCI 144 #define CONFIG_PCI_PNP 145 #define CONFIG_PCI_SCAN_SHOW 146 #define CONFIG_PCI_FIXUP_DEV 147 #define CONFIG_PCIE_IMX 148 #endif 149 150 /* 151 * PMIC 152 */ 153 #define CONFIG_POWER 154 #define CONFIG_POWER_I2C 155 #define CONFIG_POWER_PFUZE100 156 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 157 #define CONFIG_POWER_LTC3676 158 #define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c 159 160 /* Various command support */ 161 #define CONFIG_CMD_PING 162 #define CONFIG_CMD_DHCP 163 #define CONFIG_CMD_MII 164 #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */ 165 #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */ 166 #define CONFIG_CMD_GSC 167 #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */ 168 #define CONFIG_CMD_UBI 169 #define CONFIG_RBTREE 170 171 /* Ethernet support */ 172 #define CONFIG_FEC_MXC 173 #define CONFIG_MII 174 #define IMX_FEC_BASE ENET_BASE_ADDR 175 #define CONFIG_FEC_XCV_TYPE RGMII 176 #define CONFIG_FEC_MXC_PHYADDR 0 177 #define CONFIG_PHYLIB 178 #define CONFIG_ARP_TIMEOUT 200UL 179 180 /* USB Configs */ 181 #define CONFIG_CMD_USB 182 #define CONFIG_USB_EHCI 183 #define CONFIG_USB_EHCI_MX6 184 #define CONFIG_USB_STORAGE 185 #define CONFIG_USB_HOST_ETHER 186 #define CONFIG_USB_ETHER_ASIX 187 #define CONFIG_USB_ETHER_SMSC95XX 188 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 189 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 190 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 191 #define CONFIG_MXC_USB_FLAGS 0 192 #define CONFIG_USB_KEYBOARD 193 #define CONFIG_CI_UDC 194 #define CONFIG_USBD_HS 195 #define CONFIG_USB_GADGET_DUALSPEED 196 #define CONFIG_USB_ETHER 197 #define CONFIG_USB_ETH_CDC 198 #define CONFIG_NETCONSOLE 199 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 200 201 /* USB Mass Storage Gadget */ 202 #define CONFIG_USB_GADGET 203 #define CONFIG_CMD_USB_MASS_STORAGE 204 #define CONFIG_USB_FUNCTION_MASS_STORAGE 205 #define CONFIG_USB_GADGET_DOWNLOAD 206 #define CONFIG_USB_GADGET_VBUS_DRAW 2 207 208 /* Netchip IDs */ 209 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 210 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 211 #define CONFIG_G_DNL_MANUFACTURER "Gateworks" 212 213 /* Framebuffer and LCD */ 214 #define CONFIG_VIDEO 215 #define CONFIG_VIDEO_IPUV3 216 #define CONFIG_CFB_CONSOLE 217 #define CONFIG_VGA_AS_SINGLE_DEVICE 218 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 219 #define CONFIG_VIDEO_BMP_RLE8 220 #define CONFIG_SPLASH_SCREEN 221 #define CONFIG_BMP_16BPP 222 #define CONFIG_VIDEO_LOGO 223 #define CONFIG_IPUV3_CLK 260000000 224 #define CONFIG_CMD_HDMIDETECT 225 #define CONFIG_CONSOLE_MUX 226 #define CONFIG_IMX_HDMI 227 #define CONFIG_IMX_VIDEO_SKIP 228 229 /* Miscellaneous configurable options */ 230 #define CONFIG_HWCONFIG 231 232 /* Print Buffer Size */ 233 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 234 235 /* Memory configuration */ 236 #define CONFIG_SYS_MEMTEST_START 0x10000000 237 #define CONFIG_SYS_MEMTEST_END 0x10010000 238 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 239 240 /* Physical Memory Map */ 241 #define CONFIG_NR_DRAM_BANKS 1 242 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 243 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 244 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 245 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 246 247 #define CONFIG_SYS_INIT_SP_OFFSET \ 248 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 249 #define CONFIG_SYS_INIT_SP_ADDR \ 250 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 251 252 /* 253 * MTD Command for mtdparts 254 */ 255 #define CONFIG_LZO 256 #define CONFIG_CMD_MTDPARTS 257 #define CONFIG_MTD_DEVICE 258 #define CONFIG_MTD_PARTITIONS 259 #ifdef CONFIG_SPI_FLASH 260 #define MTDIDS_DEFAULT "nor0=nor" 261 #define MTDPARTS_DEFAULT \ 262 "mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)" 263 #else 264 #define MTDIDS_DEFAULT "nand0=nand" 265 #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)" 266 #endif 267 268 /* Persistent Environment Config */ 269 #ifdef CONFIG_SPI_FLASH 270 #define CONFIG_ENV_IS_IN_SPI_FLASH 271 #else 272 #define CONFIG_ENV_IS_IN_NAND 273 #endif 274 #if defined(CONFIG_ENV_IS_IN_MMC) 275 #define CONFIG_SYS_MMC_ENV_DEV 0 276 #define CONFIG_ENV_OFFSET (709 * SZ_1K) 277 #define CONFIG_ENV_SIZE (128 * SZ_1K) 278 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (128 * SZ_1K)) 279 #elif defined(CONFIG_ENV_IS_IN_NAND) 280 #define CONFIG_ENV_OFFSET (16 * SZ_1M) 281 #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K) 282 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 283 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K)) 284 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 285 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) 286 #define CONFIG_ENV_OFFSET (512 * SZ_1K) 287 #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K) 288 #define CONFIG_ENV_SIZE (8 * SZ_1K) 289 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 290 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 291 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 292 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 293 #endif 294 295 /* Environment */ 296 #define CONFIG_IPADDR 192.168.1.1 297 #define CONFIG_SERVERIP 192.168.1.146 298 #define HWCONFIG_DEFAULT \ 299 "hwconfig=rs232;" \ 300 "dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \ 301 302 #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ 303 "usb_pgood_delay=2000\0" \ 304 "console=ttymxc1\0" \ 305 "bootdevs=usb mmc sata flash\0" \ 306 HWCONFIG_DEFAULT \ 307 "video=\0" \ 308 \ 309 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 310 "mtdids=" MTDIDS_DEFAULT "\0" \ 311 \ 312 "fdt_high=0xffffffff\0" \ 313 "fdt_addr=0x18000000\0" \ 314 "initrd_high=0xffffffff\0" \ 315 "bootdir=boot\0" \ 316 "loadfdt=" \ 317 "if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \ 318 "echo Loaded DTB from ${bootdir}/${fdt_file}; " \ 319 "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \ 320 "echo Loaded DTB from ${bootdir}/${fdt_file1}; " \ 321 "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \ 322 "echo Loaded DTB from ${bootdir}/${fdt_file2}; " \ 323 "fi\0" \ 324 \ 325 "script=6x_bootscript-ventana\0" \ 326 "loadscript=" \ 327 "if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \ 328 "source; " \ 329 "fi\0" \ 330 \ 331 "uimage=uImage\0" \ 332 "mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \ 333 "mmc_boot=" \ 334 "setenv fsload 'ext2load mmc 0:1'; " \ 335 "mmc dev 0 && mmc rescan && " \ 336 "setenv dtype mmc; run loadscript; " \ 337 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ 338 "setenv bootargs console=${console},${baudrate} " \ 339 "root=/dev/mmcblk0p1 rootfstype=ext4 " \ 340 "rootwait rw ${video} ${extra}; " \ 341 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 342 "bootm ${loadaddr} - ${fdt_addr}; " \ 343 "else " \ 344 "bootm; " \ 345 "fi; " \ 346 "fi\0" \ 347 \ 348 "sata_boot=" \ 349 "setenv fsload 'ext2load sata 0:1'; sata init && " \ 350 "setenv dtype sata; run loadscript; " \ 351 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ 352 "setenv bootargs console=${console},${baudrate} " \ 353 "root=/dev/sda1 rootfstype=ext4 " \ 354 "rootwait rw ${video} ${extra}; " \ 355 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 356 "bootm ${loadaddr} - ${fdt_addr}; " \ 357 "else " \ 358 "bootm; " \ 359 "fi; " \ 360 "fi\0" \ 361 "usb_boot=" \ 362 "setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \ 363 "setenv dtype usb; run loadscript; " \ 364 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ 365 "setenv bootargs console=${console},${baudrate} " \ 366 "root=/dev/sda1 rootfstype=ext4 " \ 367 "rootwait rw ${video} ${extra}; " \ 368 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 369 "bootm ${loadaddr} - ${fdt_addr}; " \ 370 "else " \ 371 "bootm; " \ 372 "fi; " \ 373 "fi\0" 374 375 #ifdef CONFIG_SPI_FLASH 376 #define CONFIG_EXTRA_ENV_SETTINGS \ 377 CONFIG_EXTRA_ENV_SETTINGS_COMMON \ 378 "image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \ 379 "image_uboot=ventana/u-boot_spi.imx\0" \ 380 \ 381 "spi_koffset=0x90000\0" \ 382 "spi_klen=0x200000\0" \ 383 \ 384 "spi_updateuboot=echo Updating uboot from " \ 385 "${serverip}:${image_uboot}...; " \ 386 "tftpboot ${loadaddr} ${image_uboot} && " \ 387 "sf probe && sf erase 0 80000 && " \ 388 "sf write ${loadaddr} 400 ${filesize}\0" \ 389 "spi_update=echo Updating OS from ${serverip}:${image_os} " \ 390 "to ${spi_koffset} ...; " \ 391 "tftp ${loadaddr} ${image_os} && " \ 392 "sf probe && " \ 393 "sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \ 394 \ 395 "flash_boot=" \ 396 "if sf probe && " \ 397 "sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \ 398 "setenv bootargs console=${console},${baudrate} " \ 399 "root=/dev/mtdblock3 " \ 400 "rootfstype=squashfs,jffs2 " \ 401 "${video} ${extra}; " \ 402 "bootm; " \ 403 "fi\0" 404 #else 405 #define CONFIG_EXTRA_ENV_SETTINGS \ 406 CONFIG_EXTRA_ENV_SETTINGS_COMMON \ 407 \ 408 "image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \ 409 "nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \ 410 "tftp ${loadaddr} ${image_rootfs} && " \ 411 "nand erase.part rootfs && " \ 412 "nand write ${loadaddr} rootfs ${filesize}\0" \ 413 \ 414 "flash_boot=" \ 415 "setenv fsload 'ubifsload'; " \ 416 "ubi part rootfs; " \ 417 "if ubi check boot; then " \ 418 "ubifsmount ubi0:boot; " \ 419 "setenv root ubi0:rootfs ubi.mtd=2 " \ 420 "rootfstype=squashfs,ubifs; " \ 421 "setenv bootdir; " \ 422 "elif ubi check rootfs; then " \ 423 "ubifsmount ubi0:rootfs; " \ 424 "setenv root ubi0:rootfs ubi.mtd=2 " \ 425 "rootfstype=ubifs; " \ 426 "fi; " \ 427 "setenv dtype nand; run loadscript; " \ 428 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ 429 "setenv bootargs console=${console},${baudrate} " \ 430 "root=${root} ${video} ${extra}; " \ 431 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 432 "ubifsumount; " \ 433 "bootm ${loadaddr} - ${fdt_addr}; " \ 434 "else " \ 435 "ubifsumount; bootm; " \ 436 "fi; " \ 437 "fi\0" 438 #endif 439 440 #define CONFIG_BOOTCOMMAND \ 441 "for btype in ${bootdevs}; do " \ 442 "echo; echo Attempting ${btype} boot...; " \ 443 "if run ${btype}_boot; then; fi; " \ 444 "done" 445 446 /* Device Tree Support */ 447 #define CONFIG_OF_BOARD_SETUP 448 #define CONFIG_FDT_FIXUP_PARTITIONS 449 450 #endif /* __CONFIG_H */ 451