xref: /openbmc/u-boot/include/configs/gw_ventana.h (revision b419e87287ddb26ed991a64b2b14db7841b5f8c6)
1 /*
2  * Copyright (C) 2013 Gateworks Corporation
3  *
4  * SPDX-License-Identifier: GPL-2.0+
5  */
6 
7 #ifndef __CONFIG_H
8 #define __CONFIG_H
9 
10 /* SPL */
11 #define CONFIG_SPL_BOARD_INIT
12 /* Location in NAND to read U-Boot from */
13 #define CONFIG_SYS_NAND_U_BOOT_OFFS     (14 * SZ_1M)
14 
15 /* Falcon Mode */
16 #define CONFIG_CMD_SPL
17 #define CONFIG_SPL_OS_BOOT
18 #define CONFIG_SYS_SPL_ARGS_ADDR	0x18000000
19 #define CONFIG_CMD_SPL_WRITE_SIZE	(128 * SZ_1K)
20 
21 /* Falcon Mode - NAND support: args@17MB kernel@18MB */
22 #define CONFIG_CMD_SPL_NAND_OFS		(17 * SZ_1M)
23 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	(18 * SZ_1M)
24 
25 /* Falcon Mode - MMC support: args@1MB kernel@2MB */
26 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x800	/* 1MB */
27 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	(CONFIG_CMD_SPL_WRITE_SIZE / 512)
28 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x1000	/* 2MB */
29 
30 #include "imx6_spl.h"                  /* common IMX6 SPL configuration */
31 #include "mx6_common.h"
32 #undef CONFIG_DISPLAY_BOARDINFO
33 #define CONFIG_DISPLAY_BOARDINFO_LATE
34 
35 #define CONFIG_MACH_TYPE	4520   /* Gateworks Ventana Platform */
36 
37 /* Serial ATAG */
38 #define CONFIG_SERIAL_TAG
39 
40 /* Size of malloc() pool */
41 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
42 
43 /* Init Functions */
44 #define CONFIG_BOARD_EARLY_INIT_F
45 #define CONFIG_MISC_INIT_R
46 
47 /* Driver Model */
48 #ifndef CONFIG_SPL_BUILD
49 #define CONFIG_DM_GPIO
50 #define CONFIG_DM_THERMAL
51 #endif
52 
53 /* Thermal */
54 #define CONFIG_IMX_THERMAL
55 
56 /* Serial */
57 #define CONFIG_MXC_UART
58 #define CONFIG_MXC_UART_BASE	       UART2_BASE
59 
60 #ifdef CONFIG_SPI_FLASH
61 
62 /* SPI */
63 #ifdef CONFIG_CMD_SF
64   #define CONFIG_MXC_SPI
65   #define CONFIG_SPI_FLASH_MTD
66   #define CONFIG_SPI_FLASH_BAR
67   #define CONFIG_SF_DEFAULT_BUS              0
68   #define CONFIG_SF_DEFAULT_CS               0
69 					     /* GPIO 3-19 (21248) */
70   #define CONFIG_SF_DEFAULT_SPEED            30000000
71   #define CONFIG_SF_DEFAULT_MODE             (SPI_MODE_0)
72 #endif
73 
74 #else
75 /* Enable NAND support */
76 #define CONFIG_CMD_NAND
77 #define CONFIG_CMD_NAND_TRIMFFS
78 #ifdef CONFIG_CMD_NAND
79   #define CONFIG_NAND_MXS
80   #define CONFIG_SYS_MAX_NAND_DEVICE	1
81   #define CONFIG_SYS_NAND_BASE		0x40000000
82   #define CONFIG_SYS_NAND_5_ADDR_CYCLE
83   #define CONFIG_SYS_NAND_ONFI_DETECTION
84 
85   /* DMA stuff, needed for GPMI/MXS NAND support */
86   #define CONFIG_APBH_DMA
87   #define CONFIG_APBH_DMA_BURST
88   #define CONFIG_APBH_DMA_BURST8
89 #endif
90 
91 #endif /* CONFIG_SPI_FLASH */
92 
93 /* I2C Configs */
94 #define CONFIG_SYS_I2C
95 #define CONFIG_SYS_I2C_MXC
96 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
97 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
98 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
99 #define CONFIG_SYS_I2C_SPEED		100000
100 #define CONFIG_I2C_GSC			0
101 #define CONFIG_I2C_PMIC			1
102 #define CONFIG_I2C_EDID
103 
104 /* MMC Configs */
105 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
106 #define CONFIG_SYS_FSL_USDHC_NUM       1
107 
108 /* Filesystem support */
109 #define CONFIG_CMD_UBIFS
110 
111 /*
112  * SATA Configs
113  */
114 #define CONFIG_CMD_SATA
115 #ifdef CONFIG_CMD_SATA
116   #define CONFIG_DWC_AHSATA
117   #define CONFIG_SYS_SATA_MAX_DEVICE	1
118   #define CONFIG_DWC_AHSATA_PORT_ID	0
119   #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
120   #define CONFIG_LBA48
121   #define CONFIG_LIBATA
122 #endif
123 
124 /*
125  * PCI express
126  */
127 #define CONFIG_CMD_PCI
128 #ifdef CONFIG_CMD_PCI
129 #define CONFIG_PCI
130 #define CONFIG_PCI_PNP
131 #define CONFIG_PCI_SCAN_SHOW
132 #define CONFIG_PCI_FIXUP_DEV
133 #define CONFIG_PCIE_IMX
134 #endif
135 
136 /*
137  * PMIC
138  */
139 #define CONFIG_POWER
140 #define CONFIG_POWER_I2C
141 #define CONFIG_POWER_PFUZE100
142 #define CONFIG_POWER_PFUZE100_I2C_ADDR	0x08
143 #define CONFIG_POWER_LTC3676
144 #define CONFIG_POWER_LTC3676_I2C_ADDR  0x3c
145 
146 /* Various command support */
147 #define CONFIG_CMD_BMODE         /* set eFUSE shadow for a boot dev and reset */
148 #define CONFIG_CMD_HDMIDETECT    /* detect HDMI output device */
149 #define CONFIG_CMD_GSC
150 #define CONFIG_CMD_EECONFIG      /* Gateworks EEPROM config cmd */
151 #define CONFIG_CMD_UBI
152 #define CONFIG_RBTREE
153 
154 /* Ethernet support */
155 #define CONFIG_FEC_MXC
156 #define CONFIG_MII
157 #define IMX_FEC_BASE             ENET_BASE_ADDR
158 #define CONFIG_FEC_XCV_TYPE      RGMII
159 #define CONFIG_FEC_MXC_PHYADDR   0
160 #define CONFIG_PHYLIB
161 #define CONFIG_ARP_TIMEOUT       200UL
162 
163 /* USB Configs */
164 #define CONFIG_USB_EHCI
165 #define CONFIG_USB_EHCI_MX6
166 #define CONFIG_USB_HOST_ETHER
167 #define CONFIG_USB_ETHER_ASIX
168 #define CONFIG_USB_ETHER_SMSC95XX
169 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
170 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET  /* For OTG port */
171 #define CONFIG_MXC_USB_PORTSC     (PORT_PTS_UTMI | PORT_PTS_PTW)
172 #define CONFIG_MXC_USB_FLAGS      0
173 #define CONFIG_USB_KEYBOARD
174 #define CONFIG_USBD_HS
175 #define CONFIG_USB_ETHER
176 #define CONFIG_USB_ETH_CDC
177 #define CONFIG_NETCONSOLE
178 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
179 
180 /* USB Mass Storage Gadget */
181 #define CONFIG_USB_FUNCTION_MASS_STORAGE
182 
183 /* Framebuffer and LCD */
184 #define CONFIG_VIDEO
185 #define CONFIG_VIDEO_IPUV3
186 #define CONFIG_CFB_CONSOLE
187 #define CONFIG_VGA_AS_SINGLE_DEVICE
188 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
189 #define CONFIG_VIDEO_LOGO
190 #define CONFIG_IPUV3_CLK          260000000
191 #define CONFIG_CMD_HDMIDETECT
192 #define CONFIG_CONSOLE_MUX
193 #define CONFIG_IMX_HDMI
194 #define CONFIG_IMX_VIDEO_SKIP
195 #define CONFIG_VIDEO_BMP_LOGO
196 #define CONFIG_SPLASH_SCREEN_ALIGN
197 #define CONFIG_HIDE_LOGO_VERSION  /* Custom config to hide U-boot version */
198 
199 /* Miscellaneous configurable options */
200 #define CONFIG_HWCONFIG
201 #define CONFIG_PREBOOT
202 
203 /* Print Buffer Size */
204 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
205 
206 /* Memory configuration */
207 #define CONFIG_SYS_MEMTEST_START       0x10000000
208 #define CONFIG_SYS_MEMTEST_END	       0x10010000
209 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
210 
211 /* Physical Memory Map */
212 #define CONFIG_NR_DRAM_BANKS           1
213 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
214 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
215 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
216 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
217 
218 #define CONFIG_SYS_INIT_SP_OFFSET \
219 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
220 #define CONFIG_SYS_INIT_SP_ADDR \
221 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
222 
223 /*
224  * MTD Command for mtdparts
225  */
226 #define CONFIG_LZO
227 #define CONFIG_CMD_MTDPARTS
228 #define CONFIG_MTD_DEVICE
229 #define CONFIG_MTD_PARTITIONS
230 #ifdef CONFIG_SPI_FLASH
231 #define MTDIDS_DEFAULT    "nor0=nor"
232 #define MTDPARTS_DEFAULT  \
233 	"mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)"
234 #else
235 #define MTDIDS_DEFAULT    "nand0=nand"
236 #define MTDPARTS_DEFAULT  "mtdparts=nand:16m(uboot),1m(env),-(rootfs)"
237 #endif
238 
239 /* Persistent Environment Config */
240 #ifdef CONFIG_SPI_FLASH
241 #define CONFIG_ENV_IS_IN_SPI_FLASH
242 #else
243 #define CONFIG_ENV_IS_IN_NAND
244 #endif
245 #if defined(CONFIG_ENV_IS_IN_MMC)
246   #define CONFIG_SYS_MMC_ENV_DEV         0
247   #define CONFIG_ENV_OFFSET              (709 * SZ_1K)
248   #define CONFIG_ENV_SIZE                (128 * SZ_1K)
249   #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (128 * SZ_1K))
250 #elif defined(CONFIG_ENV_IS_IN_NAND)
251   #define CONFIG_ENV_OFFSET              (16 * SZ_1M)
252   #define CONFIG_ENV_SECT_SIZE           (128 * SZ_1K)
253   #define CONFIG_ENV_SIZE                CONFIG_ENV_SECT_SIZE
254   #define CONFIG_ENV_OFFSET_REDUND       (CONFIG_ENV_OFFSET + (512 * SZ_1K))
255   #define CONFIG_ENV_SIZE_REDUND         CONFIG_ENV_SIZE
256 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
257   #define CONFIG_ENV_OFFSET		(512 * SZ_1K)
258   #define CONFIG_ENV_SECT_SIZE		(64 * SZ_1K)
259   #define CONFIG_ENV_SIZE		(8 * SZ_1K)
260   #define CONFIG_ENV_SPI_BUS             CONFIG_SF_DEFAULT_BUS
261   #define CONFIG_ENV_SPI_CS              CONFIG_SF_DEFAULT_CS
262   #define CONFIG_ENV_SPI_MODE            CONFIG_SF_DEFAULT_MODE
263   #define CONFIG_ENV_SPI_MAX_HZ          CONFIG_SF_DEFAULT_SPEED
264 #endif
265 
266 /* Environment */
267 #define CONFIG_IPADDR             192.168.1.1
268 #define CONFIG_SERVERIP           192.168.1.146
269 
270 #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \
271 	"pcidisable=1\0" \
272 	"splashpos=m,m\0" \
273 	"usb_pgood_delay=2000\0" \
274 	"console=ttymxc1\0" \
275 	"bootdevs=usb mmc sata flash\0" \
276 	"hwconfig=_UNKNOWN_\0" \
277 	"video=\0" \
278 	\
279 	"mtdparts=" MTDPARTS_DEFAULT "\0" \
280 	"mtdids=" MTDIDS_DEFAULT "\0" \
281 	"disk=0\0" \
282 	"part=1\0" \
283 	\
284 	"fdt_high=0xffffffff\0" \
285 	"fdt_addr=0x18000000\0" \
286 	"initrd_high=0xffffffff\0" \
287 	"fixfdt=" \
288 		"fdt addr ${fdt_addr}\0" \
289 	"bootdir=boot\0" \
290 	"loadfdt=" \
291 		"if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \
292 			"echo Loaded DTB from ${bootdir}/${fdt_file}; " \
293 			"run fixfdt; " \
294 		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \
295 			"echo Loaded DTB from ${bootdir}/${fdt_file1}; " \
296 			"run fixfdt; " \
297 		"elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \
298 			"echo Loaded DTB from ${bootdir}/${fdt_file2}; " \
299 			"run fixfdt; " \
300 		"fi\0" \
301 	\
302 	"fs=ext4\0" \
303 	"script=6x_bootscript-ventana\0" \
304 	"loadscript=" \
305 		"if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \
306 			"source ${loadaddr}; " \
307 		"fi\0" \
308 	\
309 	"uimage=uImage\0" \
310 	"mmc_root=/dev/mmcblk0p1 rootfstype=${fs} rootwait rw\0" \
311 	"mmc_boot=" \
312 		"setenv fsload \"${fs}load mmc ${disk}:${part}\"; " \
313 		"mmc dev ${disk} && mmc rescan && " \
314 		"setenv dtype mmc; run loadscript; " \
315 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
316 			"setenv bootargs console=${console},${baudrate} " \
317 				"root=/dev/mmcblk0p1 rootfstype=${fs} " \
318 				"rootwait rw ${video} ${extra}; " \
319 			"if run loadfdt; then " \
320 				"bootm ${loadaddr} - ${fdt_addr}; " \
321 			"else " \
322 				"bootm; " \
323 			"fi; " \
324 		"fi\0" \
325 	\
326 	"sata_boot=" \
327 		"setenv fsload \"${fs}load sata ${disk}:${part}\"; " \
328 		"sata init && " \
329 		"setenv dtype sata; run loadscript; " \
330 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
331 			"setenv bootargs console=${console},${baudrate} " \
332 				"root=/dev/sda1 rootfstype=${fs} " \
333 				"rootwait rw ${video} ${extra}; " \
334 			"if run loadfdt; then " \
335 				"bootm ${loadaddr} - ${fdt_addr}; " \
336 			"else " \
337 				"bootm; " \
338 			"fi; " \
339 		"fi\0" \
340 	"usb_boot=" \
341 		"setenv fsload \"${fs}load usb ${disk}:${part}\"; " \
342 		"usb start && usb dev ${disk} && " \
343 		"setenv dtype usb; run loadscript; " \
344 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
345 			"setenv bootargs console=${console},${baudrate} " \
346 				"root=/dev/sda1 rootfstype=${fs} " \
347 				"rootwait rw ${video} ${extra}; " \
348 			"if run loadfdt; then " \
349 				"bootm ${loadaddr} - ${fdt_addr}; " \
350 			"else " \
351 				"bootm; " \
352 			"fi; " \
353 		"fi\0"
354 
355 #ifdef CONFIG_SPI_FLASH
356 	#define CONFIG_EXTRA_ENV_SETTINGS \
357 	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
358 	"image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \
359 	"image_uboot=ventana/u-boot_spi.imx\0" \
360 	\
361 	"spi_koffset=0x90000\0" \
362 	"spi_klen=0x200000\0" \
363 	\
364 	"spi_updateuboot=echo Updating uboot from " \
365 		"${serverip}:${image_uboot}...; " \
366 		"tftpboot ${loadaddr} ${image_uboot} && " \
367 		"sf probe && sf erase 0 80000 && " \
368 			"sf write ${loadaddr} 400 ${filesize}\0" \
369 	"spi_update=echo Updating OS from ${serverip}:${image_os} " \
370 		"to ${spi_koffset} ...; " \
371 		"tftp ${loadaddr} ${image_os} && " \
372 		"sf probe && " \
373 		"sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \
374 	\
375 	"flash_boot=" \
376 		"if sf probe && " \
377 		"sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \
378 			"setenv bootargs console=${console},${baudrate} " \
379 				"root=/dev/mtdblock3 " \
380 				"rootfstype=squashfs,jffs2 " \
381 				"${video} ${extra}; " \
382 			"bootm; " \
383 		"fi\0"
384 #else
385 	#define CONFIG_EXTRA_ENV_SETTINGS \
386 	CONFIG_EXTRA_ENV_SETTINGS_COMMON \
387 	\
388 	"image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \
389 	"nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \
390 		"tftp ${loadaddr} ${image_rootfs} && " \
391 		"nand erase.part rootfs && " \
392 		"nand write ${loadaddr} rootfs ${filesize}\0" \
393 	\
394 	"flash_boot=" \
395 		"setenv fsload 'ubifsload'; " \
396 		"ubi part rootfs; " \
397 		"if ubi check boot; then " \
398 			"ubifsmount ubi0:boot; " \
399 			"setenv root ubi0:rootfs ubi.mtd=2 " \
400 				"rootfstype=squashfs,ubifs; " \
401 			"setenv bootdir; " \
402 		"elif ubi check rootfs; then " \
403 			"ubifsmount ubi0:rootfs; " \
404 			"setenv root ubi0:rootfs ubi.mtd=2 " \
405 				"rootfstype=ubifs; " \
406 		"fi; " \
407 		"setenv dtype nand; run loadscript; " \
408 		"if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \
409 			"setenv bootargs console=${console},${baudrate} " \
410 				"root=${root} ${video} ${extra}; " \
411 			"if run loadfdt; then " \
412 				"ubifsumount; " \
413 				"bootm ${loadaddr} - ${fdt_addr}; " \
414 			"else " \
415 				"ubifsumount; bootm; " \
416 			"fi; " \
417 		"fi\0"
418 #endif
419 
420 #define CONFIG_BOOTCOMMAND \
421 	"for btype in ${bootdevs}; do " \
422 		"echo; echo Attempting ${btype} boot...; " \
423 		"if run ${btype}_boot; then; fi; " \
424 	"done"
425 
426 /* Device Tree Support */
427 #define CONFIG_FDT_FIXUP_PARTITIONS
428 
429 #endif			       /* __CONFIG_H */
430