1 /* 2 * Copyright (C) 2013 Gateworks Corporation 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 /* SPL */ 11 #define CONFIG_SPL_BOARD_INIT 12 #define CONFIG_SPL_NAND_SUPPORT 13 #define CONFIG_SPL_MMC_SUPPORT 14 #define CONFIG_SPL_POWER_SUPPORT 15 /* Location in NAND to read U-Boot from */ 16 #define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M) 17 18 /* Falcon Mode */ 19 #define CONFIG_CMD_SPL 20 #define CONFIG_SPL_OS_BOOT 21 #define CONFIG_SPL_ENV_SUPPORT 22 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 23 #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) 24 25 /* Falcon Mode - NAND support: args@17MB kernel@18MB */ 26 #define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M) 27 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M) 28 29 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ 30 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ 31 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) 32 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ 33 34 #include "imx6_spl.h" /* common IMX6 SPL configuration */ 35 #include "mx6_common.h" 36 37 #define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */ 38 39 /* Serial ATAG */ 40 #define CONFIG_SERIAL_TAG 41 42 /* Size of malloc() pool */ 43 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 44 45 /* Init Functions */ 46 #define CONFIG_BOARD_EARLY_INIT_F 47 #define CONFIG_MISC_INIT_R 48 49 /* Driver Model */ 50 #ifndef CONFIG_SPL_BUILD 51 #define CONFIG_DM 52 #define CONFIG_DM_GPIO 53 #define CONFIG_DM_SERIAL 54 #define CONFIG_DM_THERMAL 55 #define CONFIG_CMD_DM 56 #endif 57 58 /* GPIO */ 59 #define CONFIG_MXC_GPIO 60 #define CONFIG_CMD_GPIO 61 62 /* Thermal */ 63 #define CONFIG_IMX6_THERMAL 64 65 /* Serial */ 66 #define CONFIG_MXC_UART 67 #define CONFIG_MXC_UART_BASE UART2_BASE 68 69 #ifdef CONFIG_SPI_FLASH 70 71 /* SPI */ 72 #define CONFIG_CMD_SF 73 #ifdef CONFIG_CMD_SF 74 #define CONFIG_MXC_SPI 75 #define CONFIG_SPI_FLASH_MTD 76 #define CONFIG_SPI_FLASH_BAR 77 #define CONFIG_SPI_FLASH_WINBOND 78 #define CONFIG_SF_DEFAULT_BUS 0 79 #define CONFIG_SF_DEFAULT_CS 0 80 /* GPIO 3-19 (21248) */ 81 #define CONFIG_SF_DEFAULT_SPEED 30000000 82 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 83 #endif 84 85 #else 86 /* Enable NAND support */ 87 #define CONFIG_CMD_TIME 88 #define CONFIG_CMD_NAND 89 #define CONFIG_CMD_NAND_TRIMFFS 90 #ifdef CONFIG_CMD_NAND 91 #define CONFIG_NAND_MXS 92 #define CONFIG_SYS_MAX_NAND_DEVICE 1 93 #define CONFIG_SYS_NAND_BASE 0x40000000 94 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 95 #define CONFIG_SYS_NAND_ONFI_DETECTION 96 97 /* DMA stuff, needed for GPMI/MXS NAND support */ 98 #define CONFIG_APBH_DMA 99 #define CONFIG_APBH_DMA_BURST 100 #define CONFIG_APBH_DMA_BURST8 101 #endif 102 103 #endif /* CONFIG_SPI_FLASH */ 104 105 /* Flattened Image Tree Suport */ 106 #define CONFIG_FIT 107 #define CONFIG_FIT_VERBOSE 108 109 /* I2C Configs */ 110 #define CONFIG_CMD_I2C 111 #define CONFIG_SYS_I2C 112 #define CONFIG_SYS_I2C_MXC 113 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 114 #define CONFIG_SYS_I2C_SPEED 100000 115 #define CONFIG_I2C_GSC 0 116 #define CONFIG_I2C_PMIC 1 117 #define CONFIG_I2C_EDID 118 119 /* MMC Configs */ 120 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 121 #define CONFIG_SYS_FSL_USDHC_NUM 1 122 123 /* Filesystem support */ 124 #define CONFIG_CMD_UBIFS 125 126 /* 127 * SATA Configs 128 */ 129 #define CONFIG_CMD_SATA 130 #ifdef CONFIG_CMD_SATA 131 #define CONFIG_DWC_AHSATA 132 #define CONFIG_SYS_SATA_MAX_DEVICE 1 133 #define CONFIG_DWC_AHSATA_PORT_ID 0 134 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 135 #define CONFIG_LBA48 136 #define CONFIG_LIBATA 137 #endif 138 139 /* 140 * PCI express 141 */ 142 #define CONFIG_CMD_PCI 143 #ifdef CONFIG_CMD_PCI 144 #define CONFIG_PCI 145 #define CONFIG_PCI_PNP 146 #define CONFIG_PCI_SCAN_SHOW 147 #define CONFIG_PCI_FIXUP_DEV 148 #define CONFIG_PCIE_IMX 149 #endif 150 151 /* 152 * PMIC 153 */ 154 #define CONFIG_POWER 155 #define CONFIG_POWER_I2C 156 #define CONFIG_POWER_PFUZE100 157 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 158 #define CONFIG_POWER_LTC3676 159 #define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c 160 161 /* Various command support */ 162 #define CONFIG_CMD_PING 163 #define CONFIG_CMD_DHCP 164 #define CONFIG_CMD_MII 165 #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */ 166 #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */ 167 #define CONFIG_CMD_GSC 168 #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */ 169 #define CONFIG_CMD_UBI 170 #define CONFIG_RBTREE 171 #define CONFIG_CMD_FUSE /* eFUSE read/write support */ 172 #ifdef CONFIG_CMD_FUSE 173 #define CONFIG_MXC_OCOTP 174 #endif 175 176 177 /* Ethernet support */ 178 #define CONFIG_FEC_MXC 179 #define CONFIG_E1000 180 #define CONFIG_MII 181 #define IMX_FEC_BASE ENET_BASE_ADDR 182 #define CONFIG_FEC_XCV_TYPE RGMII 183 #define CONFIG_FEC_MXC_PHYADDR 0 184 #define CONFIG_PHYLIB 185 #define CONFIG_ARP_TIMEOUT 200UL 186 187 /* USB Configs */ 188 #define CONFIG_CMD_USB 189 #define CONFIG_USB_EHCI 190 #define CONFIG_USB_EHCI_MX6 191 #define CONFIG_USB_STORAGE 192 #define CONFIG_USB_HOST_ETHER 193 #define CONFIG_USB_ETHER_ASIX 194 #define CONFIG_USB_ETHER_SMSC95XX 195 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 196 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 197 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 198 #define CONFIG_MXC_USB_FLAGS 0 199 #define CONFIG_USB_KEYBOARD 200 #define CONFIG_CI_UDC 201 #define CONFIG_USBD_HS 202 #define CONFIG_USB_GADGET_DUALSPEED 203 #define CONFIG_USB_ETHER 204 #define CONFIG_USB_ETH_CDC 205 #define CONFIG_NETCONSOLE 206 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 207 208 /* USB Mass Storage Gadget */ 209 #define CONFIG_USB_GADGET 210 #define CONFIG_CMD_USB_MASS_STORAGE 211 #define CONFIG_USB_GADGET_MASS_STORAGE 212 #define CONFIG_USBDOWNLOAD_GADGET 213 #define CONFIG_USB_GADGET_VBUS_DRAW 2 214 215 /* Netchip IDs */ 216 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 217 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 218 #define CONFIG_G_DNL_MANUFACTURER "Gateworks" 219 220 /* Framebuffer and LCD */ 221 #define CONFIG_VIDEO 222 #define CONFIG_VIDEO_IPUV3 223 #define CONFIG_CFB_CONSOLE 224 #define CONFIG_VGA_AS_SINGLE_DEVICE 225 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 226 #define CONFIG_VIDEO_BMP_RLE8 227 #define CONFIG_SPLASH_SCREEN 228 #define CONFIG_BMP_16BPP 229 #define CONFIG_VIDEO_LOGO 230 #define CONFIG_IPUV3_CLK 260000000 231 #define CONFIG_CMD_HDMIDETECT 232 #define CONFIG_CONSOLE_MUX 233 #define CONFIG_IMX_HDMI 234 #define CONFIG_IMX_VIDEO_SKIP 235 236 /* Miscellaneous configurable options */ 237 #define CONFIG_SYS_PROMPT "Ventana > " 238 #define CONFIG_HWCONFIG 239 240 /* Print Buffer Size */ 241 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 242 243 /* Memory configuration */ 244 #define CONFIG_SYS_MEMTEST_START 0x10000000 245 #define CONFIG_SYS_MEMTEST_END 0x10010000 246 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 247 248 /* Physical Memory Map */ 249 #define CONFIG_NR_DRAM_BANKS 1 250 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 251 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 252 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 253 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 254 255 #define CONFIG_SYS_INIT_SP_OFFSET \ 256 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 257 #define CONFIG_SYS_INIT_SP_ADDR \ 258 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 259 260 /* 261 * MTD Command for mtdparts 262 */ 263 #define CONFIG_LZO 264 #define CONFIG_CMD_MTDPARTS 265 #define CONFIG_MTD_DEVICE 266 #define CONFIG_MTD_PARTITIONS 267 #ifdef CONFIG_SPI_FLASH 268 #define MTDIDS_DEFAULT "nor0=nor" 269 #define MTDPARTS_DEFAULT \ 270 "mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)" 271 #else 272 #define MTDIDS_DEFAULT "nand0=nand" 273 #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)" 274 #endif 275 276 /* Persistent Environment Config */ 277 #ifdef CONFIG_SPI_FLASH 278 #define CONFIG_ENV_IS_IN_SPI_FLASH 279 #else 280 #define CONFIG_ENV_IS_IN_NAND 281 #endif 282 #if defined(CONFIG_ENV_IS_IN_MMC) 283 #define CONFIG_SYS_MMC_ENV_DEV 0 284 #define CONFIG_ENV_OFFSET (709 * SZ_1K) 285 #define CONFIG_ENV_SIZE (128 * SZ_1K) 286 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (128 * SZ_1K)) 287 #elif defined(CONFIG_ENV_IS_IN_NAND) 288 #define CONFIG_ENV_OFFSET (16 * SZ_1M) 289 #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K) 290 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 291 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K)) 292 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 293 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) 294 #define CONFIG_ENV_OFFSET (512 * SZ_1K) 295 #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K) 296 #define CONFIG_ENV_SIZE (8 * SZ_1K) 297 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 298 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 299 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 300 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 301 #endif 302 303 /* Environment */ 304 #define CONFIG_IPADDR 192.168.1.1 305 #define CONFIG_SERVERIP 192.168.1.146 306 #define HWCONFIG_DEFAULT \ 307 "hwconfig=rs232;" \ 308 "dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \ 309 310 #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ 311 "usb_pgood_delay=2000\0" \ 312 "console=ttymxc1\0" \ 313 "bootdevs=usb mmc sata flash\0" \ 314 HWCONFIG_DEFAULT \ 315 "video=\0" \ 316 \ 317 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 318 "mtdids=" MTDIDS_DEFAULT "\0" \ 319 \ 320 "fdt_high=0xffffffff\0" \ 321 "fdt_addr=0x18000000\0" \ 322 "initrd_high=0xffffffff\0" \ 323 "bootdir=boot\0" \ 324 "loadfdt=" \ 325 "if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \ 326 "echo Loaded DTB from ${bootdir}/${fdt_file}; " \ 327 "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \ 328 "echo Loaded DTB from ${bootdir}/${fdt_file1}; " \ 329 "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \ 330 "echo Loaded DTB from ${bootdir}/${fdt_file2}; " \ 331 "fi\0" \ 332 \ 333 "script=6x_bootscript-ventana\0" \ 334 "loadscript=" \ 335 "if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \ 336 "source; " \ 337 "fi\0" \ 338 \ 339 "uimage=uImage\0" \ 340 "mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \ 341 "mmc_boot=" \ 342 "setenv fsload 'ext2load mmc 0:1'; " \ 343 "mmc dev 0 && mmc rescan && " \ 344 "setenv dtype mmc; run loadscript; " \ 345 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ 346 "setenv bootargs console=${console},${baudrate} " \ 347 "root=/dev/mmcblk0p1 rootfstype=ext4 " \ 348 "rootwait rw ${video} ${extra}; " \ 349 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 350 "bootm ${loadaddr} - ${fdt_addr}; " \ 351 "else " \ 352 "bootm; " \ 353 "fi; " \ 354 "fi\0" \ 355 \ 356 "sata_boot=" \ 357 "setenv fsload 'ext2load sata 0:1'; sata init && " \ 358 "setenv dtype sata; run loadscript; " \ 359 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ 360 "setenv bootargs console=${console},${baudrate} " \ 361 "root=/dev/sda1 rootfstype=ext4 " \ 362 "rootwait rw ${video} ${extra}; " \ 363 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 364 "bootm ${loadaddr} - ${fdt_addr}; " \ 365 "else " \ 366 "bootm; " \ 367 "fi; " \ 368 "fi\0" \ 369 "usb_boot=" \ 370 "setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \ 371 "setenv dtype usb; run loadscript; " \ 372 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ 373 "setenv bootargs console=${console},${baudrate} " \ 374 "root=/dev/sda1 rootfstype=ext4 " \ 375 "rootwait rw ${video} ${extra}; " \ 376 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 377 "bootm ${loadaddr} - ${fdt_addr}; " \ 378 "else " \ 379 "bootm; " \ 380 "fi; " \ 381 "fi\0" 382 383 #ifdef CONFIG_SPI_FLASH 384 #define CONFIG_EXTRA_ENV_SETTINGS \ 385 CONFIG_EXTRA_ENV_SETTINGS_COMMON \ 386 "image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \ 387 "image_uboot=ventana/u-boot_spi.imx\0" \ 388 \ 389 "spi_koffset=0x90000\0" \ 390 "spi_klen=0x200000\0" \ 391 \ 392 "spi_updateuboot=echo Updating uboot from " \ 393 "${serverip}:${image_uboot}...; " \ 394 "tftpboot ${loadaddr} ${image_uboot} && " \ 395 "sf probe && sf erase 0 80000 && " \ 396 "sf write ${loadaddr} 400 ${filesize}\0" \ 397 "spi_update=echo Updating OS from ${serverip}:${image_os} " \ 398 "to ${spi_koffset} ...; " \ 399 "tftp ${loadaddr} ${image_os} && " \ 400 "sf probe && " \ 401 "sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \ 402 \ 403 "flash_boot=" \ 404 "if sf probe && " \ 405 "sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \ 406 "setenv bootargs console=${console},${baudrate} " \ 407 "root=/dev/mtdblock3 " \ 408 "rootfstype=squashfs,jffs2 " \ 409 "${video} ${extra}; " \ 410 "bootm; " \ 411 "fi\0" 412 #else 413 #define CONFIG_EXTRA_ENV_SETTINGS \ 414 CONFIG_EXTRA_ENV_SETTINGS_COMMON \ 415 \ 416 "image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \ 417 "nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \ 418 "tftp ${loadaddr} ${image_rootfs} && " \ 419 "nand erase.part rootfs && " \ 420 "nand write ${loadaddr} rootfs ${filesize}\0" \ 421 \ 422 "flash_boot=" \ 423 "setenv fsload 'ubifsload'; " \ 424 "ubi part rootfs; " \ 425 "if ubi check boot; then " \ 426 "ubifsmount ubi0:boot; " \ 427 "setenv root ubi0:rootfs ubi.mtd=2 " \ 428 "rootfstype=squashfs,ubifs; " \ 429 "setenv bootdir; " \ 430 "elif ubi check rootfs; then " \ 431 "ubifsmount ubi0:rootfs; " \ 432 "setenv root ubi0:rootfs ubi.mtd=2 " \ 433 "rootfstype=ubifs; " \ 434 "fi; " \ 435 "setenv dtype nand; run loadscript; " \ 436 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ 437 "setenv bootargs console=${console},${baudrate} " \ 438 "root=${root} ${video} ${extra}; " \ 439 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 440 "ubifsumount; " \ 441 "bootm ${loadaddr} - ${fdt_addr}; " \ 442 "else " \ 443 "ubifsumount; bootm; " \ 444 "fi; " \ 445 "fi\0" 446 #endif 447 448 #define CONFIG_BOOTCOMMAND \ 449 "for btype in ${bootdevs}; do " \ 450 "echo; echo Attempting ${btype} boot...; " \ 451 "if run ${btype}_boot; then; fi; " \ 452 "done" 453 454 /* Device Tree Support */ 455 #define CONFIG_OF_BOARD_SETUP 456 #define CONFIG_FDT_FIXUP_PARTITIONS 457 458 #endif /* __CONFIG_H */ 459