1 /* 2 * Copyright (C) 2013 Gateworks Corporation 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef __CONFIG_H 8 #define __CONFIG_H 9 10 /* SPL */ 11 #define CONFIG_SPL_BOARD_INIT 12 #define CONFIG_SPL_NAND_SUPPORT 13 #define CONFIG_SPL_MMC_SUPPORT 14 #define CONFIG_SPL_POWER_SUPPORT 15 /* Location in NAND to read U-Boot from */ 16 #define CONFIG_SYS_NAND_U_BOOT_OFFS (14 * SZ_1M) 17 18 /* Falcon Mode */ 19 #define CONFIG_CMD_SPL 20 #define CONFIG_SPL_OS_BOOT 21 #define CONFIG_SPL_ENV_SUPPORT 22 #define CONFIG_SYS_SPL_ARGS_ADDR 0x18000000 23 #define CONFIG_CMD_SPL_WRITE_SIZE (128 * SZ_1K) 24 25 /* Falcon Mode - NAND support: args@17MB kernel@18MB */ 26 #define CONFIG_CMD_SPL_NAND_OFS (17 * SZ_1M) 27 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS (18 * SZ_1M) 28 29 /* Falcon Mode - MMC support: args@1MB kernel@2MB */ 30 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x800 /* 1MB */ 31 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS (CONFIG_CMD_SPL_WRITE_SIZE / 512) 32 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x1000 /* 2MB */ 33 34 #include "imx6_spl.h" /* common IMX6 SPL configuration */ 35 #include "mx6_common.h" 36 37 #define CONFIG_MACH_TYPE 4520 /* Gateworks Ventana Platform */ 38 39 /* Serial ATAG */ 40 #define CONFIG_SERIAL_TAG 41 42 /* Size of malloc() pool */ 43 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 44 45 /* Init Functions */ 46 #define CONFIG_BOARD_EARLY_INIT_F 47 #define CONFIG_MISC_INIT_R 48 49 /* Driver Model */ 50 #ifndef CONFIG_SPL_BUILD 51 #define CONFIG_DM_GPIO 52 #define CONFIG_DM_THERMAL 53 #endif 54 55 /* GPIO */ 56 #define CONFIG_MXC_GPIO 57 58 /* Thermal */ 59 #define CONFIG_IMX_THERMAL 60 61 /* Serial */ 62 #define CONFIG_MXC_UART 63 #define CONFIG_MXC_UART_BASE UART2_BASE 64 65 #ifdef CONFIG_SPI_FLASH 66 67 /* SPI */ 68 #define CONFIG_CMD_SF 69 #ifdef CONFIG_CMD_SF 70 #define CONFIG_MXC_SPI 71 #define CONFIG_SPI_FLASH_MTD 72 #define CONFIG_SPI_FLASH_BAR 73 #define CONFIG_SPI_FLASH_WINBOND 74 #define CONFIG_SF_DEFAULT_BUS 0 75 #define CONFIG_SF_DEFAULT_CS 0 76 /* GPIO 3-19 (21248) */ 77 #define CONFIG_SF_DEFAULT_SPEED 30000000 78 #define CONFIG_SF_DEFAULT_MODE (SPI_MODE_0) 79 #endif 80 81 #else 82 /* Enable NAND support */ 83 #define CONFIG_CMD_TIME 84 #define CONFIG_CMD_NAND 85 #define CONFIG_CMD_NAND_TRIMFFS 86 #ifdef CONFIG_CMD_NAND 87 #define CONFIG_NAND_MXS 88 #define CONFIG_SYS_MAX_NAND_DEVICE 1 89 #define CONFIG_SYS_NAND_BASE 0x40000000 90 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 91 #define CONFIG_SYS_NAND_ONFI_DETECTION 92 93 /* DMA stuff, needed for GPMI/MXS NAND support */ 94 #define CONFIG_APBH_DMA 95 #define CONFIG_APBH_DMA_BURST 96 #define CONFIG_APBH_DMA_BURST8 97 #endif 98 99 #endif /* CONFIG_SPI_FLASH */ 100 101 /* Flattened Image Tree Suport */ 102 #define CONFIG_FIT 103 #define CONFIG_FIT_VERBOSE 104 105 /* I2C Configs */ 106 #define CONFIG_CMD_I2C 107 #define CONFIG_SYS_I2C 108 #define CONFIG_SYS_I2C_MXC 109 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 110 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 111 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 112 #define CONFIG_SYS_I2C_SPEED 100000 113 #define CONFIG_I2C_GSC 0 114 #define CONFIG_I2C_PMIC 1 115 #define CONFIG_I2C_EDID 116 117 /* MMC Configs */ 118 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 119 #define CONFIG_SYS_FSL_USDHC_NUM 1 120 121 /* Filesystem support */ 122 #define CONFIG_CMD_UBIFS 123 124 /* 125 * SATA Configs 126 */ 127 #define CONFIG_CMD_SATA 128 #ifdef CONFIG_CMD_SATA 129 #define CONFIG_DWC_AHSATA 130 #define CONFIG_SYS_SATA_MAX_DEVICE 1 131 #define CONFIG_DWC_AHSATA_PORT_ID 0 132 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 133 #define CONFIG_LBA48 134 #define CONFIG_LIBATA 135 #endif 136 137 /* 138 * PCI express 139 */ 140 #define CONFIG_CMD_PCI 141 #ifdef CONFIG_CMD_PCI 142 #define CONFIG_PCI 143 #define CONFIG_PCI_PNP 144 #define CONFIG_PCI_SCAN_SHOW 145 #define CONFIG_PCI_FIXUP_DEV 146 #define CONFIG_PCIE_IMX 147 #endif 148 149 /* 150 * PMIC 151 */ 152 #define CONFIG_POWER 153 #define CONFIG_POWER_I2C 154 #define CONFIG_POWER_PFUZE100 155 #define CONFIG_POWER_PFUZE100_I2C_ADDR 0x08 156 #define CONFIG_POWER_LTC3676 157 #define CONFIG_POWER_LTC3676_I2C_ADDR 0x3c 158 159 /* Various command support */ 160 #define CONFIG_CMD_PING 161 #define CONFIG_CMD_DHCP 162 #define CONFIG_CMD_MII 163 #define CONFIG_CMD_BMODE /* set eFUSE shadow for a boot dev and reset */ 164 #define CONFIG_CMD_HDMIDETECT /* detect HDMI output device */ 165 #define CONFIG_CMD_GSC 166 #define CONFIG_CMD_EECONFIG /* Gateworks EEPROM config cmd */ 167 #define CONFIG_CMD_UBI 168 #define CONFIG_RBTREE 169 170 /* Ethernet support */ 171 #define CONFIG_FEC_MXC 172 #define CONFIG_MII 173 #define IMX_FEC_BASE ENET_BASE_ADDR 174 #define CONFIG_FEC_XCV_TYPE RGMII 175 #define CONFIG_FEC_MXC_PHYADDR 0 176 #define CONFIG_PHYLIB 177 #define CONFIG_ARP_TIMEOUT 200UL 178 179 /* USB Configs */ 180 #define CONFIG_CMD_USB 181 #define CONFIG_USB_EHCI 182 #define CONFIG_USB_EHCI_MX6 183 #define CONFIG_USB_STORAGE 184 #define CONFIG_USB_HOST_ETHER 185 #define CONFIG_USB_ETHER_ASIX 186 #define CONFIG_USB_ETHER_SMSC95XX 187 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 188 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 189 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 190 #define CONFIG_MXC_USB_FLAGS 0 191 #define CONFIG_USB_KEYBOARD 192 #define CONFIG_CI_UDC 193 #define CONFIG_USBD_HS 194 #define CONFIG_USB_GADGET_DUALSPEED 195 #define CONFIG_USB_ETHER 196 #define CONFIG_USB_ETH_CDC 197 #define CONFIG_NETCONSOLE 198 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 199 200 /* USB Mass Storage Gadget */ 201 #define CONFIG_USB_GADGET 202 #define CONFIG_CMD_USB_MASS_STORAGE 203 #define CONFIG_USB_FUNCTION_MASS_STORAGE 204 #define CONFIG_USB_GADGET_DOWNLOAD 205 #define CONFIG_USB_GADGET_VBUS_DRAW 2 206 207 /* Netchip IDs */ 208 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 209 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 210 #define CONFIG_G_DNL_MANUFACTURER "Gateworks" 211 212 /* Framebuffer and LCD */ 213 #define CONFIG_VIDEO 214 #define CONFIG_VIDEO_IPUV3 215 #define CONFIG_CFB_CONSOLE 216 #define CONFIG_VGA_AS_SINGLE_DEVICE 217 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 218 #define CONFIG_VIDEO_BMP_RLE8 219 #define CONFIG_SPLASH_SCREEN 220 #define CONFIG_BMP_16BPP 221 #define CONFIG_VIDEO_LOGO 222 #define CONFIG_IPUV3_CLK 260000000 223 #define CONFIG_CMD_HDMIDETECT 224 #define CONFIG_CONSOLE_MUX 225 #define CONFIG_IMX_HDMI 226 #define CONFIG_IMX_VIDEO_SKIP 227 228 /* Miscellaneous configurable options */ 229 #define CONFIG_HWCONFIG 230 231 /* Print Buffer Size */ 232 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 233 234 /* Memory configuration */ 235 #define CONFIG_SYS_MEMTEST_START 0x10000000 236 #define CONFIG_SYS_MEMTEST_END 0x10010000 237 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 238 239 /* Physical Memory Map */ 240 #define CONFIG_NR_DRAM_BANKS 1 241 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 242 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 243 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 244 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 245 246 #define CONFIG_SYS_INIT_SP_OFFSET \ 247 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 248 #define CONFIG_SYS_INIT_SP_ADDR \ 249 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 250 251 /* 252 * MTD Command for mtdparts 253 */ 254 #define CONFIG_LZO 255 #define CONFIG_CMD_MTDPARTS 256 #define CONFIG_MTD_DEVICE 257 #define CONFIG_MTD_PARTITIONS 258 #ifdef CONFIG_SPI_FLASH 259 #define MTDIDS_DEFAULT "nor0=nor" 260 #define MTDPARTS_DEFAULT \ 261 "mtdparts=nor:512k(uboot),64k(env),2m(kernel),-(rootfs)" 262 #else 263 #define MTDIDS_DEFAULT "nand0=nand" 264 #define MTDPARTS_DEFAULT "mtdparts=nand:16m(uboot),1m(env),-(rootfs)" 265 #endif 266 267 /* Persistent Environment Config */ 268 #ifdef CONFIG_SPI_FLASH 269 #define CONFIG_ENV_IS_IN_SPI_FLASH 270 #else 271 #define CONFIG_ENV_IS_IN_NAND 272 #endif 273 #if defined(CONFIG_ENV_IS_IN_MMC) 274 #define CONFIG_SYS_MMC_ENV_DEV 0 275 #define CONFIG_ENV_OFFSET (709 * SZ_1K) 276 #define CONFIG_ENV_SIZE (128 * SZ_1K) 277 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (128 * SZ_1K)) 278 #elif defined(CONFIG_ENV_IS_IN_NAND) 279 #define CONFIG_ENV_OFFSET (16 * SZ_1M) 280 #define CONFIG_ENV_SECT_SIZE (128 * SZ_1K) 281 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 282 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + (512 * SZ_1K)) 283 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 284 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) 285 #define CONFIG_ENV_OFFSET (512 * SZ_1K) 286 #define CONFIG_ENV_SECT_SIZE (64 * SZ_1K) 287 #define CONFIG_ENV_SIZE (8 * SZ_1K) 288 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 289 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 290 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 291 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 292 #endif 293 294 /* Environment */ 295 #define CONFIG_IPADDR 192.168.1.1 296 #define CONFIG_SERVERIP 192.168.1.146 297 #define HWCONFIG_DEFAULT \ 298 "hwconfig=rs232;" \ 299 "dio0:mode=gpio;dio1:mode=gpio;dio2:mode=gpio;dio3:mode=gpio\0" \ 300 301 #define CONFIG_EXTRA_ENV_SETTINGS_COMMON \ 302 "usb_pgood_delay=2000\0" \ 303 "console=ttymxc1\0" \ 304 "bootdevs=usb mmc sata flash\0" \ 305 HWCONFIG_DEFAULT \ 306 "video=\0" \ 307 \ 308 "mtdparts=" MTDPARTS_DEFAULT "\0" \ 309 "mtdids=" MTDIDS_DEFAULT "\0" \ 310 \ 311 "fdt_high=0xffffffff\0" \ 312 "fdt_addr=0x18000000\0" \ 313 "initrd_high=0xffffffff\0" \ 314 "bootdir=boot\0" \ 315 "loadfdt=" \ 316 "if ${fsload} ${fdt_addr} ${bootdir}/${fdt_file}; then " \ 317 "echo Loaded DTB from ${bootdir}/${fdt_file}; " \ 318 "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file1}; then " \ 319 "echo Loaded DTB from ${bootdir}/${fdt_file1}; " \ 320 "elif ${fsload} ${fdt_addr} ${bootdir}/${fdt_file2}; then " \ 321 "echo Loaded DTB from ${bootdir}/${fdt_file2}; " \ 322 "fi\0" \ 323 \ 324 "script=6x_bootscript-ventana\0" \ 325 "loadscript=" \ 326 "if ${fsload} ${loadaddr} ${bootdir}/${script}; then " \ 327 "source; " \ 328 "fi\0" \ 329 \ 330 "uimage=uImage\0" \ 331 "mmc_root=/dev/mmcblk0p1 rootfstype=ext4 rootwait rw\0" \ 332 "mmc_boot=" \ 333 "setenv fsload 'ext2load mmc 0:1'; " \ 334 "mmc dev 0 && mmc rescan && " \ 335 "setenv dtype mmc; run loadscript; " \ 336 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ 337 "setenv bootargs console=${console},${baudrate} " \ 338 "root=/dev/mmcblk0p1 rootfstype=ext4 " \ 339 "rootwait rw ${video} ${extra}; " \ 340 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 341 "bootm ${loadaddr} - ${fdt_addr}; " \ 342 "else " \ 343 "bootm; " \ 344 "fi; " \ 345 "fi\0" \ 346 \ 347 "sata_boot=" \ 348 "setenv fsload 'ext2load sata 0:1'; sata init && " \ 349 "setenv dtype sata; run loadscript; " \ 350 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ 351 "setenv bootargs console=${console},${baudrate} " \ 352 "root=/dev/sda1 rootfstype=ext4 " \ 353 "rootwait rw ${video} ${extra}; " \ 354 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 355 "bootm ${loadaddr} - ${fdt_addr}; " \ 356 "else " \ 357 "bootm; " \ 358 "fi; " \ 359 "fi\0" \ 360 "usb_boot=" \ 361 "setenv fsload 'ext2load usb 0:1'; usb start && usb dev 0 && " \ 362 "setenv dtype usb; run loadscript; " \ 363 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ 364 "setenv bootargs console=${console},${baudrate} " \ 365 "root=/dev/sda1 rootfstype=ext4 " \ 366 "rootwait rw ${video} ${extra}; " \ 367 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 368 "bootm ${loadaddr} - ${fdt_addr}; " \ 369 "else " \ 370 "bootm; " \ 371 "fi; " \ 372 "fi\0" 373 374 #ifdef CONFIG_SPI_FLASH 375 #define CONFIG_EXTRA_ENV_SETTINGS \ 376 CONFIG_EXTRA_ENV_SETTINGS_COMMON \ 377 "image_os=ventana/openwrt-imx6-imx6q-gw5400-a-squashfs.bin\0" \ 378 "image_uboot=ventana/u-boot_spi.imx\0" \ 379 \ 380 "spi_koffset=0x90000\0" \ 381 "spi_klen=0x200000\0" \ 382 \ 383 "spi_updateuboot=echo Updating uboot from " \ 384 "${serverip}:${image_uboot}...; " \ 385 "tftpboot ${loadaddr} ${image_uboot} && " \ 386 "sf probe && sf erase 0 80000 && " \ 387 "sf write ${loadaddr} 400 ${filesize}\0" \ 388 "spi_update=echo Updating OS from ${serverip}:${image_os} " \ 389 "to ${spi_koffset} ...; " \ 390 "tftp ${loadaddr} ${image_os} && " \ 391 "sf probe && " \ 392 "sf update ${loadaddr} ${spi_koffset} ${filesize}\0" \ 393 \ 394 "flash_boot=" \ 395 "if sf probe && " \ 396 "sf read ${loadaddr} ${spi_koffset} ${spi_klen}; then " \ 397 "setenv bootargs console=${console},${baudrate} " \ 398 "root=/dev/mtdblock3 " \ 399 "rootfstype=squashfs,jffs2 " \ 400 "${video} ${extra}; " \ 401 "bootm; " \ 402 "fi\0" 403 #else 404 #define CONFIG_EXTRA_ENV_SETTINGS \ 405 CONFIG_EXTRA_ENV_SETTINGS_COMMON \ 406 \ 407 "image_rootfs=openwrt-imx6-ventana-rootfs.ubi\0" \ 408 "nand_update=echo Updating NAND from ${serverip}:${image_rootfs}...; " \ 409 "tftp ${loadaddr} ${image_rootfs} && " \ 410 "nand erase.part rootfs && " \ 411 "nand write ${loadaddr} rootfs ${filesize}\0" \ 412 \ 413 "flash_boot=" \ 414 "setenv fsload 'ubifsload'; " \ 415 "ubi part rootfs; " \ 416 "if ubi check boot; then " \ 417 "ubifsmount ubi0:boot; " \ 418 "setenv root ubi0:rootfs ubi.mtd=2 " \ 419 "rootfstype=squashfs,ubifs; " \ 420 "setenv bootdir; " \ 421 "elif ubi check rootfs; then " \ 422 "ubifsmount ubi0:rootfs; " \ 423 "setenv root ubi0:rootfs ubi.mtd=2 " \ 424 "rootfstype=ubifs; " \ 425 "fi; " \ 426 "setenv dtype nand; run loadscript; " \ 427 "if ${fsload} ${loadaddr} ${bootdir}/${uimage}; then " \ 428 "setenv bootargs console=${console},${baudrate} " \ 429 "root=${root} ${video} ${extra}; " \ 430 "if run loadfdt && fdt addr ${fdt_addr}; then " \ 431 "ubifsumount; " \ 432 "bootm ${loadaddr} - ${fdt_addr}; " \ 433 "else " \ 434 "ubifsumount; bootm; " \ 435 "fi; " \ 436 "fi\0" 437 #endif 438 439 #define CONFIG_BOOTCOMMAND \ 440 "for btype in ${bootdevs}; do " \ 441 "echo; echo Attempting ${btype} boot...; " \ 442 "if run ${btype}_boot; then; fi; " \ 443 "done" 444 445 /* Device Tree Support */ 446 #define CONFIG_OF_BOARD_SETUP 447 #define CONFIG_FDT_FIXUP_PARTITIONS 448 449 #endif /* __CONFIG_H */ 450