1 /* 2 * (C) Copyright 2011 3 * eInfochips Ltd. <www.einfochips.com> 4 * Written-by: Ajay Bhargav <ajay.bhargav@einfochips.com> 5 * 6 * Based on Aspenite: 7 * (C) Copyright 2010 8 * Marvell Semiconductor <www.marvell.com> 9 * Written-by: Prafulla Wadaskar <prafulla@marvell.com> 10 * Contributor: Mahavir Jain <mjain@marvell.com> 11 * 12 * See file CREDITS for list of people who contributed to this 13 * project. 14 * 15 * This program is free software; you can redistribute it and/or 16 * modify it under the terms of the GNU General Public License as 17 * published by the Free Software Foundation; either version 2 of 18 * the License, or (at your option) any later version. 19 * 20 * This program is distributed in the hope that it will be useful, 21 * but WITHOUT ANY WARRANTY; without even the implied warranty of 22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 23 * GNU General Public License for more details. 24 * 25 * You should have received a copy of the GNU General Public License 26 * along with this program; if not, write to the Free Software 27 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, 28 * MA 02110-1301 USA 29 */ 30 31 #ifndef __CONFIG_GPLUGD_H 32 #define __CONFIG_GPLUGD_H 33 34 /* 35 * FIXME: fix for error caused due to recent update to mach-types.h 36 */ 37 #include <asm/mach-types.h> 38 #ifdef MACH_TYPE_SHEEVAD 39 #error "MACH_TYPE_SHEEVAD has been defined properly, please remove this." 40 #else 41 #define MACH_TYPE_SHEEVAD 2625 42 #endif 43 44 /* 45 * Version number information 46 */ 47 #define CONFIG_IDENT_STRING "\nMarvell-gplugD" 48 49 /* 50 * High Level Configuration Options 51 */ 52 #define CONFIG_SHEEVA_88SV331xV5 1 /* CPU Core subversion */ 53 #define CONFIG_ARMADA100 1 /* SOC Family Name */ 54 #define CONFIG_ARMADA168 1 /* SOC Used on this Board */ 55 #define CONFIG_MACH_TYPE MACH_TYPE_SHEEVAD /* Machine type */ 56 #define CONFIG_SKIP_LOWLEVEL_INIT /* disable board lowlevel_init */ 57 58 #define CONFIG_SYS_TEXT_BASE 0x00f00000 59 60 /* 61 * There is no internal RAM in ARMADA100, using DRAM 62 * TBD: dcache to be used for this 63 */ 64 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE - 0x00200000) 65 #define CONFIG_NR_DRAM_BANKS_MAX 2 66 67 /* 68 * Commands configuration 69 */ 70 #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ 71 #include <config_cmd_default.h> 72 #define CONFIG_CMD_I2C 73 #define CONFIG_CMD_AUTOSCRIPT 74 #undef CONFIG_CMD_FPGA 75 76 /* Disable DCACHE */ 77 #define CONFIG_SYS_DCACHE_OFF 78 79 /* Network configuration */ 80 #ifdef CONFIG_CMD_NET 81 #define CONFIG_CMD_PING 82 #define CONFIG_ARMADA100_FEC 83 84 /* DHCP Support */ 85 #define CONFIG_CMD_DHCP 86 #define CONFIG_BOOTP_DHCP_REQUEST_DELAY 50000 87 #endif /* CONFIG_CMD_NET */ 88 89 /* GPIO Support */ 90 #define CONFIG_MARVELL_GPIO 91 92 /* PHY configuration */ 93 #define CONFIG_MII 94 #define CONFIG_CMD_MII 95 #define CONFIG_RESET_PHY_R 96 /* 88E3015 register definition */ 97 #define PHY_LED_PAR_SEL_REG 22 98 #define PHY_LED_MAN_REG 25 99 #define PHY_LED_VAL 0x5b /* LINK LED1, ACT LED2 */ 100 /* GPIO Configuration for PHY */ 101 #define CONFIG_SYS_GPIO_PHY_RST 104 /* GPIO104 */ 102 103 /* SPI Support */ 104 #define CONFIG_ARMADA100_SPI 105 #define CONFIG_ENV_SPI_CS 110 106 #define CONFIG_SYS_SSP_PORT 2 107 108 /* Flash Support */ 109 #define CONFIG_CMD_SF 110 #define CONFIG_SPI_FLASH_ATMEL 111 112 /* 113 * mv-common.h should be defined after CMD configs since it used them 114 * to enable certain macros 115 */ 116 #include "mv-common.h" 117 #undef CONFIG_ARCH_MISC_INIT 118 119 #ifdef CONFIG_SYS_NS16550_COM1 120 #undef CONFIG_SYS_NS16550_COM1 121 #endif /* CONFIG_SYS_NS16550_COM1 */ 122 123 #define CONFIG_SYS_NS16550_COM1 ARMD1_UART3_BASE 124 125 /* 126 * Environment variables configurations 127 */ 128 #define CONFIG_ENV_IS_IN_SPI_FLASH 129 #define CONFIG_ENV_SECT_SIZE 0x4000 130 #define CONFIG_ENV_SIZE 0x4000 131 #define CONFIG_ENV_OFFSET 0x07C000 132 133 #define CONFIG_CMD_ASKENV 134 #define CONFIG_CMD_EDITENV 135 #define CONFIG_CMD_SAVEENV 136 137 #endif /* __CONFIG_GPLUGD_H */ 138