xref: /openbmc/u-boot/include/configs/gose.h (revision c9bb942e2f91d9f8e5f25ed1961eba2d64f65b8d)
1 /*
2  * include/configs/gose.h
3  *
4  * Copyright (C) 2014 Renesas Electronics Corporation
5  *
6  * SPDX-License-Identifier: GPL-2.0
7  */
8 
9 #ifndef __GOSE_H
10 #define __GOSE_H
11 
12 #undef DEBUG
13 #define CONFIG_R8A7793
14 #define CONFIG_RMOBILE_BOARD_STRING "Gose"
15 
16 #include "rcar-gen2-common.h"
17 
18 #if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
19 #define CONFIG_SYS_TEXT_BASE	0x70000000
20 #else
21 #define CONFIG_SYS_TEXT_BASE	0xE6304000
22 #endif
23 
24 /* STACK */
25 #if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
26 #define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
27 #else
28 #define CONFIG_SYS_INIT_SP_ADDR		0xE633FFFC
29 #endif
30 
31 #define STACK_AREA_SIZE			0xC000
32 #define LOW_LEVEL_MERAM_STACK	\
33 	(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
34 
35 /* MEMORY */
36 #define RCAR_GEN2_SDRAM_BASE		0x40000000
37 #define RCAR_GEN2_SDRAM_SIZE		0x40000000
38 #define RCAR_GEN2_UBOOT_SDRAM_SIZE	0x20000000
39 
40 /* SCIF */
41 #define CONFIG_SCIF_CONSOLE
42 
43 /* FLASH */
44 #define CONFIG_SYS_NO_FLASH
45 #define CONFIG_SPI
46 #define CONFIG_SH_QSPI
47 #define CONFIG_SPI_FLASH_BAR
48 #define CONFIG_SPI_FLASH_SPANSION
49 
50 /* SH Ether */
51 #define CONFIG_SH_ETHER
52 #define CONFIG_SH_ETHER_USE_PORT	0
53 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
54 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
55 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
56 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
57 #define CONFIG_PHYLIB
58 #define CONFIG_PHY_MICREL
59 #define CONFIG_BITBANGMII
60 #define CONFIG_BITBANGMII_MULTI
61 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
62 
63 /* Board Clock */
64 #define RMOBILE_XTAL_CLK	20000000u
65 #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
66 #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
67 #define CONFIG_SYS_TMU_CLK_DIV	4
68 
69 /* I2C */
70 #define CONFIG_SYS_I2C
71 #define CONFIG_SYS_I2C_SH
72 #define CONFIG_SYS_I2C_SLAVE	0x7F
73 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	3
74 #define CONFIG_SYS_I2C_SH_SPEED0	400000
75 #define CONFIG_SYS_I2C_SH_SPEED1	400000
76 #define CONFIG_SYS_I2C_SH_SPEED2	400000
77 #define CONFIG_SH_I2C_DATA_HIGH	4
78 #define CONFIG_SH_I2C_DATA_LOW	5
79 #define CONFIG_SH_I2C_CLOCK	10000000
80 
81 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
82 
83 /* USB */
84 #define CONFIG_USB_STORAGE
85 #define CONFIG_USB_EHCI
86 #define CONFIG_USB_EHCI_RMOBILE
87 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
88 
89 /* Module stop status bits */
90 /* INTC-RT */
91 #define CONFIG_SMSTP0_ENA	0x00400000
92 /* MSIF */
93 #define CONFIG_SMSTP2_ENA	0x00002000
94 /* INTC-SYS, IRQC */
95 #define CONFIG_SMSTP4_ENA	0x00000180
96 /* SCIF0 */
97 #define CONFIG_SMSTP7_ENA	0x00200000
98 
99 /* SDHI */
100 #define CONFIG_MMC
101 #define CONFIG_CMD_MMC
102 #define CONFIG_GENERIC_MMC
103 #define CONFIG_SH_SDHI_FREQ		97500000
104 
105 #endif	/* __GOSE_H */
106