xref: /openbmc/u-boot/include/configs/gose.h (revision 0649cd0d)
1 /*
2  * include/configs/gose.h
3  *
4  * Copyright (C) 2014 Renesas Electronics Corporation
5  *
6  * SPDX-License-Identifier: GPL-2.0
7  */
8 
9 #ifndef __GOSE_H
10 #define __GOSE_H
11 
12 #undef DEBUG
13 #define CONFIG_R8A7793
14 #define CONFIG_ARCH_RMOBILE_BOARD_STRING "Gose"
15 
16 #include "rcar-gen2-common.h"
17 
18 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
19 #define CONFIG_SYS_TEXT_BASE	0x70000000
20 #else
21 #define CONFIG_SYS_TEXT_BASE	0xE6304000
22 #endif
23 
24 /* STACK */
25 #if defined(CONFIG_ARCH_RMOBILE_EXTRAM_BOOT)
26 #define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
27 #else
28 #define CONFIG_SYS_INIT_SP_ADDR		0xE633FFFC
29 #endif
30 
31 #define STACK_AREA_SIZE			0xC000
32 #define LOW_LEVEL_MERAM_STACK	\
33 	(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
34 
35 /* MEMORY */
36 #define RCAR_GEN2_SDRAM_BASE		0x40000000
37 #define RCAR_GEN2_SDRAM_SIZE		0x40000000
38 #define RCAR_GEN2_UBOOT_SDRAM_SIZE	0x20000000
39 
40 /* SCIF */
41 
42 /* FLASH */
43 #define CONFIG_SPI
44 #define CONFIG_SH_QSPI
45 
46 /* SH Ether */
47 #define CONFIG_SH_ETHER
48 #define CONFIG_SH_ETHER_USE_PORT	0
49 #define CONFIG_SH_ETHER_PHY_ADDR	0x1
50 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
51 #define CONFIG_SH_ETHER_CACHE_WRITEBACK
52 #define CONFIG_SH_ETHER_CACHE_INVALIDATE
53 #define CONFIG_BITBANGMII
54 #define CONFIG_BITBANGMII_MULTI
55 #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
56 
57 /* Board Clock */
58 #define RMOBILE_XTAL_CLK	20000000u
59 #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
60 #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
61 #define CONFIG_SYS_TMU_CLK_DIV	4
62 
63 /* I2C */
64 #define CONFIG_SYS_I2C
65 #define CONFIG_SYS_I2C_SH
66 #define CONFIG_SYS_I2C_SLAVE	0x7F
67 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	3
68 #define CONFIG_SYS_I2C_SH_SPEED0	400000
69 #define CONFIG_SYS_I2C_SH_SPEED1	400000
70 #define CONFIG_SYS_I2C_SH_SPEED2	400000
71 #define CONFIG_SH_I2C_DATA_HIGH	4
72 #define CONFIG_SH_I2C_DATA_LOW	5
73 #define CONFIG_SH_I2C_CLOCK	10000000
74 
75 #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
76 
77 /* USB */
78 #define CONFIG_USB_EHCI_RMOBILE
79 #define CONFIG_USB_MAX_CONTROLLER_COUNT	2
80 
81 /* Module stop status bits */
82 /* INTC-RT */
83 #define CONFIG_SMSTP0_ENA	0x00400000
84 /* MSIF */
85 #define CONFIG_SMSTP2_ENA	0x00002000
86 /* INTC-SYS, IRQC */
87 #define CONFIG_SMSTP4_ENA	0x00000180
88 /* SCIF0 */
89 #define CONFIG_SMSTP7_ENA	0x00200000
90 
91 /* SDHI */
92 #define CONFIG_SH_SDHI_FREQ		97500000
93 
94 #endif	/* __GOSE_H */
95