xref: /openbmc/u-boot/include/configs/gose.h (revision f0261243)
16a994e5bSNobuhiro Iwamatsu /*
26a994e5bSNobuhiro Iwamatsu  * include/configs/gose.h
36a994e5bSNobuhiro Iwamatsu  *
46a994e5bSNobuhiro Iwamatsu  * Copyright (C) 2014 Renesas Electronics Corporation
56a994e5bSNobuhiro Iwamatsu  *
66a994e5bSNobuhiro Iwamatsu  * SPDX-License-Identifier: GPL-2.0
76a994e5bSNobuhiro Iwamatsu  */
86a994e5bSNobuhiro Iwamatsu 
96a994e5bSNobuhiro Iwamatsu #ifndef __GOSE_H
106a994e5bSNobuhiro Iwamatsu #define __GOSE_H
116a994e5bSNobuhiro Iwamatsu 
126a994e5bSNobuhiro Iwamatsu #undef DEBUG
136a994e5bSNobuhiro Iwamatsu #define CONFIG_R8A7793
146a994e5bSNobuhiro Iwamatsu #define CONFIG_RMOBILE_BOARD_STRING "Gose"
156a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_GPIO_PFC
166a994e5bSNobuhiro Iwamatsu 
176a994e5bSNobuhiro Iwamatsu #include <asm/arch/rmobile.h>
186a994e5bSNobuhiro Iwamatsu 
196a994e5bSNobuhiro Iwamatsu #define CONFIG_CMD_EDITENV
206a994e5bSNobuhiro Iwamatsu #define CONFIG_CMD_SAVEENV
216a994e5bSNobuhiro Iwamatsu #define CONFIG_CMD_MEMORY
226a994e5bSNobuhiro Iwamatsu #define CONFIG_CMD_DFL
236a994e5bSNobuhiro Iwamatsu #define CONFIG_CMD_SDRAM
246a994e5bSNobuhiro Iwamatsu #define CONFIG_CMD_RUN
256a994e5bSNobuhiro Iwamatsu #define CONFIG_CMD_LOADS
266a994e5bSNobuhiro Iwamatsu #define CONFIG_CMD_BOOTZ
276a994e5bSNobuhiro Iwamatsu #define CONFIG_CMD_SF
286a994e5bSNobuhiro Iwamatsu #define CONFIG_CMD_SPI
296a994e5bSNobuhiro Iwamatsu #define CONFIG_CMD_I2C
30*f0261243SNobuhiro Iwamatsu #define CONFIG_CMD_NET
31*f0261243SNobuhiro Iwamatsu #define CONFIG_CMD_PING
32*f0261243SNobuhiro Iwamatsu #define CONFIG_CMD_NFS
33*f0261243SNobuhiro Iwamatsu #define CONFIG_CMD_DHCP
34*f0261243SNobuhiro Iwamatsu #define CONFIG_CMD_MII
356a994e5bSNobuhiro Iwamatsu 
366a994e5bSNobuhiro Iwamatsu #if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
376a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE	0x70000000
386a994e5bSNobuhiro Iwamatsu #else
396a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_TEXT_BASE	0xE6304000
406a994e5bSNobuhiro Iwamatsu #endif
416a994e5bSNobuhiro Iwamatsu 
426a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_THUMB_BUILD
436a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_GENERIC_BOARD
446a994e5bSNobuhiro Iwamatsu 
456a994e5bSNobuhiro Iwamatsu #define	CONFIG_CMDLINE_TAG
466a994e5bSNobuhiro Iwamatsu #define	CONFIG_SETUP_MEMORY_TAGS
476a994e5bSNobuhiro Iwamatsu #define	CONFIG_INITRD_TAG
486a994e5bSNobuhiro Iwamatsu #define	CONFIG_CMDLINE_EDITING
496a994e5bSNobuhiro Iwamatsu 
506a994e5bSNobuhiro Iwamatsu #define CONFIG_OF_LIBFDT
516a994e5bSNobuhiro Iwamatsu 
526a994e5bSNobuhiro Iwamatsu #define CONFIG_BAUDRATE		38400
536a994e5bSNobuhiro Iwamatsu #define CONFIG_BOOTDELAY	3
546a994e5bSNobuhiro Iwamatsu #define CONFIG_BOOTARGS		""
556a994e5bSNobuhiro Iwamatsu 
566a994e5bSNobuhiro Iwamatsu #define CONFIG_VERSION_VARIABLE
576a994e5bSNobuhiro Iwamatsu #undef	CONFIG_SHOW_BOOT_PROGRESS
586a994e5bSNobuhiro Iwamatsu 
596a994e5bSNobuhiro Iwamatsu #define CONFIG_ARCH_CPU_INIT
606a994e5bSNobuhiro Iwamatsu #define CONFIG_DISPLAY_CPUINFO
616a994e5bSNobuhiro Iwamatsu #define CONFIG_DISPLAY_BOARDINFO
626a994e5bSNobuhiro Iwamatsu #define CONFIG_BOARD_EARLY_INIT_F
636a994e5bSNobuhiro Iwamatsu #define CONFIG_TMU_TIMER
646a994e5bSNobuhiro Iwamatsu 
656a994e5bSNobuhiro Iwamatsu /* STACK */
666a994e5bSNobuhiro Iwamatsu #if defined(CONFIG_RMOBILE_EXTRAM_BOOT)
676a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR		0x7003FFFC
686a994e5bSNobuhiro Iwamatsu #else
696a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_INIT_SP_ADDR		0xE633FFFC
706a994e5bSNobuhiro Iwamatsu #endif
716a994e5bSNobuhiro Iwamatsu 
726a994e5bSNobuhiro Iwamatsu #define STACK_AREA_SIZE			0xC000
736a994e5bSNobuhiro Iwamatsu #define LOW_LEVEL_MERAM_STACK	\
746a994e5bSNobuhiro Iwamatsu 	(CONFIG_SYS_INIT_SP_ADDR + STACK_AREA_SIZE - 4)
756a994e5bSNobuhiro Iwamatsu 
766a994e5bSNobuhiro Iwamatsu /* MEMORY */
776a994e5bSNobuhiro Iwamatsu #define GOSE_SDRAM_BASE		0x40000000
786a994e5bSNobuhiro Iwamatsu #define GOSE_SDRAM_SIZE		0x40000000
796a994e5bSNobuhiro Iwamatsu #define GOSE_UBOOT_SDRAM_SIZE	0x20000000
806a994e5bSNobuhiro Iwamatsu 
816a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_LONGHELP
826a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_CBSIZE		256
836a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_PBSIZE		256
846a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_MAXARGS		16
856a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_BARGSIZE		512
866a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_BAUDRATE_TABLE	{ 38400, 115200 }
876a994e5bSNobuhiro Iwamatsu 
886a994e5bSNobuhiro Iwamatsu /* SCIF */
896a994e5bSNobuhiro Iwamatsu #define CONFIG_SCIF_CONSOLE
906a994e5bSNobuhiro Iwamatsu #define CONFIG_CONS_SCIF0
916a994e5bSNobuhiro Iwamatsu #define CONFIG_SCIF_USE_EXT_CLK
926a994e5bSNobuhiro Iwamatsu #undef	CONFIG_SYS_CONSOLE_INFO_QUIET
936a994e5bSNobuhiro Iwamatsu #undef	CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
946a994e5bSNobuhiro Iwamatsu #undef	CONFIG_SYS_CONSOLE_ENV_OVERWRITE
956a994e5bSNobuhiro Iwamatsu 
966a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_MEMTEST_START	(GOSE_SDRAM_BASE)
976a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
986a994e5bSNobuhiro Iwamatsu 					 504 * 1024 * 1024)
996a994e5bSNobuhiro Iwamatsu #undef	CONFIG_SYS_ALT_MEMTEST
1006a994e5bSNobuhiro Iwamatsu #undef	CONFIG_SYS_MEMTEST_SCRATCH
1016a994e5bSNobuhiro Iwamatsu #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
1026a994e5bSNobuhiro Iwamatsu 
1036a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_SDRAM_BASE		(GOSE_SDRAM_BASE)
1046a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_SDRAM_SIZE		(GOSE_UBOOT_SDRAM_SIZE)
1056a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_LOAD_ADDR		(CONFIG_SYS_SDRAM_BASE + 0x7fc0)
1066a994e5bSNobuhiro Iwamatsu #define CONFIG_NR_DRAM_BANKS		1
1076a994e5bSNobuhiro Iwamatsu 
1086a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_MONITOR_BASE		0x00000000
1096a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_MONITOR_LEN		(256 * 1024)
1106a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_MALLOC_LEN		(1 * 1024 * 1024)
1116a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_BOOTMAPSZ		(8 * 1024 * 1024)
1126a994e5bSNobuhiro Iwamatsu 
1136a994e5bSNobuhiro Iwamatsu /* FLASH */
1146a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_NO_FLASH
1156a994e5bSNobuhiro Iwamatsu #define CONFIG_SPI
1166a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_QSPI
1176a994e5bSNobuhiro Iwamatsu #define CONFIG_SPI_FLASH
1186a994e5bSNobuhiro Iwamatsu #define CONFIG_SPI_FLASH_BAR
1196a994e5bSNobuhiro Iwamatsu #define CONFIG_SPI_FLASH_SPANSION
1206a994e5bSNobuhiro Iwamatsu /* ENV setting */
1216a994e5bSNobuhiro Iwamatsu #define CONFIG_ENV_IS_IN_SPI_FLASH
1226a994e5bSNobuhiro Iwamatsu #define CONFIG_ENV_ADDR	0xC0000
1236a994e5bSNobuhiro Iwamatsu 
1246a994e5bSNobuhiro Iwamatsu /* Common ENV setting */
1256a994e5bSNobuhiro Iwamatsu #define CONFIG_ENV_OVERWRITE
1266a994e5bSNobuhiro Iwamatsu #define CONFIG_ENV_SECT_SIZE	(256 * 1024)
1276a994e5bSNobuhiro Iwamatsu #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR)
1286a994e5bSNobuhiro Iwamatsu #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
1296a994e5bSNobuhiro Iwamatsu #define CONFIG_ENV_SIZE_REDUND	(CONFIG_SYS_MONITOR_LEN)
1306a994e5bSNobuhiro Iwamatsu 
131*f0261243SNobuhiro Iwamatsu /* SH Ether */
132*f0261243SNobuhiro Iwamatsu #define	CONFIG_NET_MULTI
133*f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER
134*f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_USE_PORT	0
135*f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_ADDR	0x1
136*f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_RMII
137*f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_WRITEBACK
138*f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_CACHE_INVALIDATE
139*f0261243SNobuhiro Iwamatsu #define CONFIG_PHYLIB
140*f0261243SNobuhiro Iwamatsu #define CONFIG_PHY_MICREL
141*f0261243SNobuhiro Iwamatsu #define CONFIG_BITBANGMII
142*f0261243SNobuhiro Iwamatsu #define CONFIG_BITBANGMII_MULTI
143*f0261243SNobuhiro Iwamatsu #define CONFIG_SH_ETHER_ALIGNE_SIZE	64
144*f0261243SNobuhiro Iwamatsu 
1456a994e5bSNobuhiro Iwamatsu /* Board Clock */
1466a994e5bSNobuhiro Iwamatsu #define RMOBILE_XTAL_CLK	20000000u
1476a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
1486a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_TMU_CLK_FREQ	(CONFIG_SYS_CLK_FREQ / 2)
1496a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_SCIF_CLK_FREQ	14745600
1506a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_TMU_CLK_DIV	4
1516a994e5bSNobuhiro Iwamatsu 
1526a994e5bSNobuhiro Iwamatsu /* I2C */
1536a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C
1546a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH
1556a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SLAVE	0x7F
1566a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS	3
1576a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_BASE0		0xE6500000
1586a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED0	400000
1596a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_BASE1		0xE6510000
1606a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED1	400000
1616a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_BASE2		0xE60B0000
1626a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_SH_SPEED2	400000
1636a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_HIGH	4
1646a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_I2C_DATA_LOW	5
1656a994e5bSNobuhiro Iwamatsu #define CONFIG_SH_I2C_CLOCK	10000000
1666a994e5bSNobuhiro Iwamatsu 
1676a994e5bSNobuhiro Iwamatsu #define CONFIG_SYS_I2C_POWERIC_ADDR 0x58 /* da9063 */
1686a994e5bSNobuhiro Iwamatsu 
1696a994e5bSNobuhiro Iwamatsu #endif	/* __GOSE_H */
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