1 /* 2 * Copyright (C) 2015 Timesys Corporation 3 * Copyright (C) 2015 General Electric Company 4 * Copyright (C) 2014 Advantech 5 * Copyright (C) 2012 Freescale Semiconductor, Inc. 6 * 7 * Configuration settings for the GE MX6Q Bx50v3 boards. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __GE_BX50V3_CONFIG_H 13 #define __GE_BX50V3_CONFIG_H 14 15 #include <asm/arch/imx-regs.h> 16 #include <asm/imx-common/gpio.h> 17 18 #define BX50V3_BOOTARGS_EXTRA 19 #if defined(CONFIG_TARGET_GE_B450V3) 20 #define CONFIG_BOARD_NAME "General Electric B450v3" 21 #elif defined(CONFIG_TARGET_GE_B650V3) 22 #define CONFIG_BOARD_NAME "General Electric B650v3" 23 #elif defined(CONFIG_TARGET_GE_B850V3) 24 #define CONFIG_BOARD_NAME "General Electric B850v3" 25 #undef BX50V3_BOOTARGS_EXTRA 26 #define BX50V3_BOOTARGS_EXTRA "video=DP-1:1024x768@60 " \ 27 "video=HDMI-A-1:1024x768@60 " 28 #else 29 #define CONFIG_BOARD_NAME "General Electric BA16 Generic" 30 #endif 31 32 #define CONFIG_MXC_UART_BASE UART3_BASE 33 #define CONSOLE_DEV "ttymxc2" 34 35 #define CONFIG_SUPPORT_EMMC_BOOT 36 37 38 #include "mx6_common.h" 39 #include <linux/sizes.h> 40 41 #define CONFIG_CMDLINE_TAG 42 #define CONFIG_SETUP_MEMORY_TAGS 43 #define CONFIG_INITRD_TAG 44 #define CONFIG_REVISION_TAG 45 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 46 47 #define CONFIG_MXC_GPIO 48 #define CONFIG_MXC_UART 49 50 #define CONFIG_CMD_FUSE 51 #define CONFIG_MXC_OCOTP 52 53 /* SATA Configs */ 54 #ifdef CONFIG_CMD_SATA 55 #define CONFIG_DWC_AHSATA 56 #define CONFIG_SYS_SATA_MAX_DEVICE 1 57 #define CONFIG_DWC_AHSATA_PORT_ID 0 58 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 59 #define CONFIG_LBA48 60 #define CONFIG_LIBATA 61 #endif 62 63 /* MMC Configs */ 64 #define CONFIG_FSL_ESDHC 65 #define CONFIG_FSL_USDHC 66 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 67 #define CONFIG_BOUNCE_BUFFER 68 69 /* USB Configs */ 70 #ifdef CONFIG_USB 71 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 72 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 73 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 74 #define CONFIG_MXC_USB_FLAGS 0 75 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 76 77 #define CONFIG_CI_UDC 78 #define CONFIG_USBD_HS 79 #define CONFIG_USB_GADGET_DUALSPEED 80 #define CONFIG_USB_GADGET 81 #define CONFIG_USB_GADGET_DOWNLOAD 82 #define CONFIG_USB_GADGET_MASS_STORAGE 83 #define CONFIG_USB_FUNCTION_MASS_STORAGE 84 #define CONFIG_USB_GADGET_VBUS_DRAW 2 85 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 86 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 87 #define CONFIG_G_DNL_MANUFACTURER "Advantech" 88 #endif 89 90 /* Networking Configs */ 91 #ifdef CONFIG_NET 92 #define CONFIG_FEC_MXC 93 #define CONFIG_MII 94 #define IMX_FEC_BASE ENET_BASE_ADDR 95 #define CONFIG_FEC_XCV_TYPE RGMII 96 #define CONFIG_ETHPRIME "FEC" 97 #define CONFIG_FEC_MXC_PHYADDR 4 98 #define CONFIG_PHYLIB 99 #define CONFIG_PHY_ATHEROS 100 #endif 101 102 /* Serial Flash */ 103 #ifdef CONFIG_CMD_SF 104 #define CONFIG_MXC_SPI 105 #define CONFIG_SF_DEFAULT_BUS 0 106 #define CONFIG_SF_DEFAULT_CS 0 107 #define CONFIG_SF_DEFAULT_SPEED 20000000 108 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 109 #endif 110 111 /* allow to overwrite serial and ethaddr */ 112 #define CONFIG_ENV_OVERWRITE 113 #define CONFIG_CONS_INDEX 1 114 115 #define CONFIG_LOADADDR 0x12000000 116 #define CONFIG_SYS_TEXT_BASE 0x17800000 117 118 #define CONFIG_EXTRA_ENV_SETTINGS \ 119 "script=boot.scr\0" \ 120 "image=/boot/uImage\0" \ 121 "uboot=u-boot.imx\0" \ 122 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 123 "fdt_addr=0x18000000\0" \ 124 "boot_fdt=yes\0" \ 125 "ip_dyn=yes\0" \ 126 "console=" CONSOLE_DEV "\0" \ 127 "fdt_high=0xffffffff\0" \ 128 "initrd_high=0xffffffff\0" \ 129 "sddev=0\0" \ 130 "emmcdev=1\0" \ 131 "partnum=1\0" \ 132 "update_sd_firmware=" \ 133 "if test ${ip_dyn} = yes; then " \ 134 "setenv get_cmd dhcp; " \ 135 "else " \ 136 "setenv get_cmd tftp; " \ 137 "fi; " \ 138 "if mmc dev ${mmcdev}; then " \ 139 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 140 "setexpr fw_sz ${filesize} / 0x200; " \ 141 "setexpr fw_sz ${fw_sz} + 1; " \ 142 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 143 "fi; " \ 144 "fi\0" \ 145 "update_sf_uboot=" \ 146 "if tftp $loadaddr $uboot; then " \ 147 "sf probe; " \ 148 "sf erase 0 0xC0000; " \ 149 "sf write $loadaddr 0x400 $filesize; " \ 150 "echo 'U-Boot upgraded. Please reset'; " \ 151 "fi\0" \ 152 "setargs=setenv bootargs console=${console},${baudrate} " \ 153 "root=/dev/${rootdev} rw rootwait cma=128M " \ 154 BX50V3_BOOTARGS_EXTRA "\0" \ 155 "loadbootscript=" \ 156 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \ 157 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \ 158 " source\0" \ 159 "loadimage=" \ 160 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ 161 "loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \ 162 "tryboot=" \ 163 "if run loadbootscript; then " \ 164 "run bootscript; " \ 165 "else " \ 166 "if run loadimage; then " \ 167 "run doboot; " \ 168 "fi; " \ 169 "fi;\0" \ 170 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \ 171 "run setargs; " \ 172 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 173 "if run loadfdt; then " \ 174 "bootm ${loadaddr} - ${fdt_addr}; " \ 175 "else " \ 176 "if test ${boot_fdt} = try; then " \ 177 "bootm; " \ 178 "else " \ 179 "echo WARN: Cannot load the DT; " \ 180 "fi; " \ 181 "fi; " \ 182 "else " \ 183 "bootm; " \ 184 "fi;\0" \ 185 "netargs=setenv bootargs console=${console},${baudrate} " \ 186 "root=/dev/nfs " \ 187 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 188 "netboot=echo Booting from net ...; " \ 189 "run netargs; " \ 190 "if test ${ip_dyn} = yes; then " \ 191 "setenv get_cmd dhcp; " \ 192 "else " \ 193 "setenv get_cmd tftp; " \ 194 "fi; " \ 195 "${get_cmd} ${image}; " \ 196 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 197 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 198 "bootm ${loadaddr} - ${fdt_addr}; " \ 199 "else " \ 200 "if test ${boot_fdt} = try; then " \ 201 "bootm; " \ 202 "else " \ 203 "echo WARN: Cannot load the DT; " \ 204 "fi; " \ 205 "fi; " \ 206 "else " \ 207 "bootm; " \ 208 "fi;\0" \ 209 210 #define CONFIG_MMCBOOTCOMMAND \ 211 "setenv dev mmc; " \ 212 "setenv rootdev mmcblk0p${partnum}; " \ 213 \ 214 "setenv devnum ${sddev}; " \ 215 "if mmc dev ${devnum}; then " \ 216 "run tryboot; " \ 217 "setenv rootdev mmcblk1p${partnum}; " \ 218 "fi; " \ 219 \ 220 "setenv devnum ${emmcdev}; " \ 221 "if mmc dev ${devnum}; then " \ 222 "run tryboot; " \ 223 "fi; " \ 224 225 #define CONFIG_USBBOOTCOMMAND \ 226 "usb start; " \ 227 "setenv dev usb; " \ 228 "setenv devnum 0; " \ 229 "setenv rootdev sda${partnum}; " \ 230 "run tryboot; " \ 231 \ 232 CONFIG_MMCBOOTCOMMAND \ 233 "bmode usb; " \ 234 235 #ifdef CONFIG_CMD_USB 236 #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND 237 #else 238 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND 239 #endif 240 241 #define CONFIG_ARP_TIMEOUT 200UL 242 243 /* Miscellaneous configurable options */ 244 #define CONFIG_SYS_LONGHELP 245 #define CONFIG_AUTO_COMPLETE 246 247 /* Print Buffer Size */ 248 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 249 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 250 251 #define CONFIG_SYS_MEMTEST_START 0x10000000 252 #define CONFIG_SYS_MEMTEST_END 0x10010000 253 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 254 255 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 256 257 #define CONFIG_CMDLINE_EDITING 258 259 /* Physical Memory Map */ 260 #define CONFIG_NR_DRAM_BANKS 1 261 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 262 263 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 264 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 265 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 266 267 #define CONFIG_SYS_INIT_SP_OFFSET \ 268 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 269 #define CONFIG_SYS_INIT_SP_ADDR \ 270 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 271 272 /* environment organization */ 273 #define CONFIG_ENV_IS_IN_SPI_FLASH 274 #define CONFIG_ENV_SIZE (8 * 1024) 275 #define CONFIG_ENV_OFFSET (768 * 1024) 276 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 277 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 278 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 279 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 280 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 281 282 #ifndef CONFIG_SYS_DCACHE_OFF 283 #endif 284 285 #define CONFIG_SYS_FSL_USDHC_NUM 3 286 287 /* Framebuffer */ 288 #ifdef CONFIG_VIDEO 289 #define CONFIG_VIDEO_IPUV3 290 #define CONFIG_VIDEO_BMP_RLE8 291 #define CONFIG_SPLASH_SCREEN 292 #define CONFIG_SPLASH_SCREEN_ALIGN 293 #define CONFIG_BMP_16BPP 294 #define CONFIG_VIDEO_LOGO 295 #define CONFIG_VIDEO_BMP_LOGO 296 #define CONFIG_IPUV3_CLK 260000000 297 #define CONFIG_IMX_HDMI 298 #define CONFIG_IMX_VIDEO_SKIP 299 #endif 300 301 #define CONFIG_PWM_IMX 302 #define CONFIG_IMX6_PWM_PER_CLK 66000000 303 304 #undef CONFIG_CMD_PCI 305 #ifdef CONFIG_CMD_PCI 306 #define CONFIG_PCI_SCAN_SHOW 307 #define CONFIG_PCIE_IMX 308 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 309 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5) 310 #endif 311 312 /* I2C Configs */ 313 #define CONFIG_SYS_I2C 314 #define CONFIG_SYS_I2C_MXC 315 #define CONFIG_SYS_I2C_SPEED 100000 316 #define CONFIG_SYS_I2C_MXC_I2C1 317 #define CONFIG_SYS_I2C_MXC_I2C2 318 #define CONFIG_SYS_I2C_MXC_I2C3 319 320 #endif /* __GE_BX50V3_CONFIG_H */ 321