xref: /openbmc/u-boot/include/configs/ge_bx50v3.h (revision a3b36c84)
1 /*
2  * Copyright (C) 2015 Timesys Corporation
3  * Copyright (C) 2015 General Electric Company
4  * Copyright (C) 2014 Advantech
5  * Copyright (C) 2012 Freescale Semiconductor, Inc.
6  *
7  * Configuration settings for the GE MX6Q Bx50v3 boards.
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #ifndef __GE_BX50V3_CONFIG_H
13 #define __GE_BX50V3_CONFIG_H
14 
15 #include <asm/arch/imx-regs.h>
16 #include <asm/mach-imx/gpio.h>
17 
18 #define BX50V3_BOOTARGS_EXTRA
19 #if defined(CONFIG_TARGET_GE_B450V3)
20 #define CONFIG_BOARD_NAME	"General Electric B450v3"
21 #elif defined(CONFIG_TARGET_GE_B650V3)
22 #define CONFIG_BOARD_NAME	"General Electric B650v3"
23 #elif defined(CONFIG_TARGET_GE_B850V3)
24 #define CONFIG_BOARD_NAME	"General Electric B850v3"
25 #undef BX50V3_BOOTARGS_EXTRA
26 #define BX50V3_BOOTARGS_EXTRA	"video=DP-1:1024x768@60 " \
27 				"video=HDMI-A-1:1024x768@60 "
28 #else
29 #define CONFIG_BOARD_NAME	"General Electric BA16 Generic"
30 #endif
31 
32 #define CONFIG_MXC_UART_BASE	UART3_BASE
33 #define CONSOLE_DEV	"ttymxc2"
34 
35 #define CONFIG_SUPPORT_EMMC_BOOT
36 
37 
38 #include "mx6_common.h"
39 #include <linux/sizes.h>
40 
41 #define CONFIG_CMDLINE_TAG
42 #define CONFIG_SETUP_MEMORY_TAGS
43 #define CONFIG_INITRD_TAG
44 #define CONFIG_REVISION_TAG
45 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
46 
47 #define CONFIG_MXC_GPIO
48 #define CONFIG_MXC_UART
49 
50 #define CONFIG_MXC_OCOTP
51 
52 /* SATA Configs */
53 #ifdef CONFIG_CMD_SATA
54 #define CONFIG_DWC_AHSATA
55 #define CONFIG_SYS_SATA_MAX_DEVICE	1
56 #define CONFIG_DWC_AHSATA_PORT_ID	0
57 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
58 #define CONFIG_LBA48
59 #define CONFIG_LIBATA
60 #endif
61 
62 /* MMC Configs */
63 #define CONFIG_FSL_ESDHC
64 #define CONFIG_FSL_USDHC
65 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
66 #define CONFIG_BOUNCE_BUFFER
67 
68 /* USB Configs */
69 #ifdef CONFIG_USB
70 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
71 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
72 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
73 #define CONFIG_MXC_USB_FLAGS	0
74 
75 #define CONFIG_USBD_HS
76 #define CONFIG_USB_GADGET_MASS_STORAGE
77 #define CONFIG_USB_FUNCTION_MASS_STORAGE
78 #endif
79 
80 /* Networking Configs */
81 #ifdef CONFIG_NET
82 #define CONFIG_FEC_MXC
83 #define CONFIG_MII
84 #define IMX_FEC_BASE			ENET_BASE_ADDR
85 #define CONFIG_FEC_XCV_TYPE		RGMII
86 #define CONFIG_ETHPRIME		"FEC"
87 #define CONFIG_FEC_MXC_PHYADDR		4
88 #define CONFIG_PHY_ATHEROS
89 #endif
90 
91 /* Serial Flash */
92 #ifdef CONFIG_CMD_SF
93 #define CONFIG_MXC_SPI
94 #define CONFIG_SF_DEFAULT_BUS		0
95 #define CONFIG_SF_DEFAULT_CS		0
96 #define CONFIG_SF_DEFAULT_SPEED	20000000
97 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
98 #endif
99 
100 /* allow to overwrite serial and ethaddr */
101 #define CONFIG_ENV_OVERWRITE
102 #define CONFIG_CONS_INDEX	1
103 
104 #define CONFIG_LOADADDR	0x12000000
105 #define CONFIG_SYS_TEXT_BASE	0x17800000
106 
107 #define CONFIG_EXTRA_ENV_SETTINGS \
108 	"script=boot.scr\0" \
109 	"image=/boot/uImage\0" \
110 	"uboot=u-boot.imx\0" \
111 	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
112 	"fdt_addr=0x18000000\0" \
113 	"boot_fdt=yes\0" \
114 	"ip_dyn=yes\0" \
115 	"console=" CONSOLE_DEV "\0" \
116 	"fdt_high=0xffffffff\0"	  \
117 	"initrd_high=0xffffffff\0" \
118 	"sddev=0\0" \
119 	"emmcdev=1\0" \
120 	"partnum=1\0" \
121 	"update_sd_firmware=" \
122 		"if test ${ip_dyn} = yes; then " \
123 			"setenv get_cmd dhcp; " \
124 		"else " \
125 			"setenv get_cmd tftp; " \
126 		"fi; " \
127 		"if mmc dev ${mmcdev}; then "	\
128 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
129 				"setexpr fw_sz ${filesize} / 0x200; " \
130 				"setexpr fw_sz ${fw_sz} + 1; "	\
131 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
132 			"fi; "	\
133 		"fi\0" \
134 	"update_sf_uboot=" \
135 		"if tftp $loadaddr $uboot; then " \
136 			"sf probe; " \
137 			"sf erase 0 0xC0000; " \
138 			"sf write $loadaddr 0x400 $filesize; " \
139 			"echo 'U-Boot upgraded. Please reset'; " \
140 		"fi\0" \
141 	"setargs=setenv bootargs console=${console},${baudrate} " \
142 		"root=/dev/${rootdev} rw rootwait cma=128M " \
143 		BX50V3_BOOTARGS_EXTRA "\0" \
144 	"loadbootscript=" \
145 		"ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
146 	"bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
147 		" source\0" \
148 	"loadimage=" \
149 		"ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
150 	"loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
151 	"tryboot=" \
152 		"if run loadbootscript; then " \
153 			"run bootscript; " \
154 		"else " \
155 			"if run loadimage; then " \
156 				"run doboot; " \
157 			"fi; " \
158 		"fi;\0" \
159 	"doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
160 		"run setargs; " \
161 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
162 			"if run loadfdt; then " \
163 				"bootm ${loadaddr} - ${fdt_addr}; " \
164 			"else " \
165 				"if test ${boot_fdt} = try; then " \
166 					"bootm; " \
167 				"else " \
168 					"echo WARN: Cannot load the DT; " \
169 				"fi; " \
170 			"fi; " \
171 		"else " \
172 			"bootm; " \
173 		"fi;\0" \
174 	"netargs=setenv bootargs console=${console},${baudrate} " \
175 		"root=/dev/nfs " \
176 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
177 	"netboot=echo Booting from net ...; " \
178 		"run netargs; " \
179 		"if test ${ip_dyn} = yes; then " \
180 			"setenv get_cmd dhcp; " \
181 		"else " \
182 			"setenv get_cmd tftp; " \
183 		"fi; " \
184 		"${get_cmd} ${image}; " \
185 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
186 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
187 				"bootm ${loadaddr} - ${fdt_addr}; " \
188 			"else " \
189 				"if test ${boot_fdt} = try; then " \
190 					"bootm; " \
191 				"else " \
192 					"echo WARN: Cannot load the DT; " \
193 				"fi; " \
194 			"fi; " \
195 		"else " \
196 			"bootm; " \
197 		"fi;\0" \
198 
199 #define CONFIG_MMCBOOTCOMMAND \
200 	"setenv dev mmc; " \
201 	"setenv rootdev mmcblk0p${partnum}; " \
202 	\
203 	"setenv devnum ${sddev}; " \
204 	"if mmc dev ${devnum}; then " \
205 		"run tryboot; " \
206 		"setenv rootdev mmcblk1p${partnum}; " \
207 	"fi; " \
208 	\
209 	"setenv devnum ${emmcdev}; " \
210 	"if mmc dev ${devnum}; then " \
211 		"run tryboot; " \
212 	"fi; " \
213 
214 #define CONFIG_USBBOOTCOMMAND \
215 	"usb start; " \
216 	"setenv dev usb; " \
217 	"setenv devnum 0; " \
218 	"setenv rootdev sda${partnum}; " \
219 	"run tryboot; " \
220 	\
221 	CONFIG_MMCBOOTCOMMAND \
222 	"bmode usb; " \
223 
224 #ifdef CONFIG_CMD_USB
225 #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND
226 #else
227 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
228 #endif
229 
230 #define CONFIG_ARP_TIMEOUT     200UL
231 
232 /* Miscellaneous configurable options */
233 #define CONFIG_SYS_LONGHELP
234 #define CONFIG_AUTO_COMPLETE
235 
236 #define CONFIG_SYS_MEMTEST_START       0x10000000
237 #define CONFIG_SYS_MEMTEST_END         0x10010000
238 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
239 
240 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
241 
242 #define CONFIG_CMDLINE_EDITING
243 
244 /* Physical Memory Map */
245 #define CONFIG_NR_DRAM_BANKS           1
246 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
247 
248 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
249 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
250 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
251 
252 #define CONFIG_SYS_INIT_SP_OFFSET \
253 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
254 #define CONFIG_SYS_INIT_SP_ADDR \
255 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
256 
257 /* environment organization */
258 #define CONFIG_ENV_SIZE		(8 * 1024)
259 #define CONFIG_ENV_OFFSET		(768 * 1024)
260 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
261 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
262 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
263 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
264 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
265 
266 #ifndef CONFIG_SYS_DCACHE_OFF
267 #endif
268 
269 #define CONFIG_SYS_FSL_USDHC_NUM	3
270 
271 /* Framebuffer */
272 #ifdef CONFIG_VIDEO
273 #define CONFIG_VIDEO_IPUV3
274 #define CONFIG_VIDEO_BMP_RLE8
275 #define CONFIG_SPLASH_SCREEN
276 #define CONFIG_SPLASH_SCREEN_ALIGN
277 #define CONFIG_BMP_16BPP
278 #define CONFIG_VIDEO_LOGO
279 #define CONFIG_VIDEO_BMP_LOGO
280 #define CONFIG_IMX_HDMI
281 #define CONFIG_IMX_VIDEO_SKIP
282 #endif
283 
284 #define CONFIG_PWM_IMX
285 #define CONFIG_IMX6_PWM_PER_CLK	66000000
286 
287 #ifdef CONFIG_CMD_PCI
288 #define CONFIG_PCI_SCAN_SHOW
289 #define CONFIG_PCIE_IMX
290 #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(7, 12)
291 #define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(1, 5)
292 #endif
293 
294 /* I2C Configs */
295 #define CONFIG_SYS_I2C
296 #define CONFIG_SYS_I2C_MXC
297 #define CONFIG_SYS_I2C_SPEED		  100000
298 #define CONFIG_SYS_I2C_MXC_I2C1
299 #define CONFIG_SYS_I2C_MXC_I2C2
300 #define CONFIG_SYS_I2C_MXC_I2C3
301 
302 #define CONFIG_SYS_NUM_I2C_BUSES        9
303 #define CONFIG_SYS_I2C_MAX_HOPS         1
304 #define CONFIG_SYS_I2C_BUSES	{	{0, {I2C_NULL_HOP} }, \
305 					{0, {{I2C_MUX_PCA9547, 0x70, 0} } }, \
306 					{0, {{I2C_MUX_PCA9547, 0x70, 1} } }, \
307 					{0, {{I2C_MUX_PCA9547, 0x70, 2} } }, \
308 					{0, {{I2C_MUX_PCA9547, 0x70, 3} } }, \
309 					{0, {{I2C_MUX_PCA9547, 0x70, 4} } }, \
310 					{0, {{I2C_MUX_PCA9547, 0x70, 5} } }, \
311 					{0, {{I2C_MUX_PCA9547, 0x70, 6} } }, \
312 					{0, {{I2C_MUX_PCA9547, 0x70, 7} } }, \
313 				}
314 
315 #define CONFIG_BCH
316 
317 #endif	/* __GE_BX50V3_CONFIG_H */
318