1 /* 2 * Copyright (C) 2015 Timesys Corporation 3 * Copyright (C) 2015 General Electric Company 4 * Copyright (C) 2014 Advantech 5 * Copyright (C) 2012 Freescale Semiconductor, Inc. 6 * 7 * Configuration settings for the GE MX6Q Bx50v3 boards. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __GE_BX50V3_CONFIG_H 13 #define __GE_BX50V3_CONFIG_H 14 15 #include <asm/arch/imx-regs.h> 16 #include <asm/imx-common/gpio.h> 17 18 #if defined(CONFIG_TARGET_GE_B450V3) 19 #define CONFIG_BOARD_NAME "General Electric B450v3" 20 #define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b450v3.dtb" 21 #elif defined(CONFIG_TARGET_GE_B650V3) 22 #define CONFIG_BOARD_NAME "General Electric B650v3" 23 #define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b650v3.dtb" 24 #elif defined(CONFIG_TARGET_GE_B850V3) 25 #define CONFIG_BOARD_NAME "General Electric B850v3" 26 #define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-b850v3.dtb" 27 #else 28 #define CONFIG_BOARD_NAME "General Electric BA16 Generic" 29 #define CONFIG_DEFAULT_FDT_FILE "/boot/imx6q-ba16.dtb" 30 #endif 31 32 #define CONFIG_MXC_UART_BASE UART3_BASE 33 #define CONFIG_CONSOLE_DEV "ttymxc2" 34 35 #define PHYS_SDRAM_SIZE (2u * 1024 * 1024 * 1024) 36 37 #define CONFIG_SUPPORT_EMMC_BOOT 38 39 #define CONFIG_BOOTDELAY 1 40 41 #include "mx6_common.h" 42 #include <linux/sizes.h> 43 44 #define CONFIG_DISPLAY_CPUINFO 45 #define CONFIG_DISPLAY_BOARDINFO 46 47 #define CONFIG_CMDLINE_TAG 48 #define CONFIG_SETUP_MEMORY_TAGS 49 #define CONFIG_INITRD_TAG 50 #define CONFIG_REVISION_TAG 51 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 52 53 #define CONFIG_BOARD_EARLY_INIT_F 54 #define CONFIG_BOARD_LATE_INIT 55 56 #define CONFIG_MXC_GPIO 57 #define CONFIG_MXC_UART 58 59 #define CONFIG_CMD_FUSE 60 #define CONFIG_MXC_OCOTP 61 62 /* SATA Configs */ 63 #define CONFIG_CMD_SATA 64 #define CONFIG_DWC_AHSATA 65 #define CONFIG_SYS_SATA_MAX_DEVICE 1 66 #define CONFIG_DWC_AHSATA_PORT_ID 0 67 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 68 #define CONFIG_LBA48 69 #define CONFIG_LIBATA 70 71 /* MMC Configs */ 72 #define CONFIG_FSL_ESDHC 73 #define CONFIG_FSL_USDHC 74 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 75 #define CONFIG_MMC 76 #define CONFIG_CMD_MMC 77 #define CONFIG_GENERIC_MMC 78 #define CONFIG_BOUNCE_BUFFER 79 #define CONFIG_CMD_EXT2 80 #define CONFIG_CMD_FAT 81 #define CONFIG_DOS_PARTITION 82 83 /* USB Configs */ 84 #define CONFIG_CMD_USB 85 #define CONFIG_CMD_FAT 86 #define CONFIG_USB_EHCI 87 #define CONFIG_USB_EHCI_MX6 88 #define CONFIG_USB_STORAGE 89 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 90 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 91 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 92 #define CONFIG_MXC_USB_FLAGS 0 93 #define CONFIG_USB_KEYBOARD 94 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 95 96 #define CONFIG_CI_UDC 97 #define CONFIG_USBD_HS 98 #define CONFIG_USB_GADGET_DUALSPEED 99 #define CONFIG_USB_GADGET 100 #define CONFIG_USB_GADGET_DOWNLOAD 101 #define CONFIG_CMD_USB_MASS_STORAGE 102 #define CONFIG_USB_GADGET_MASS_STORAGE 103 #define CONFIG_USB_FUNCTION_MASS_STORAGE 104 #define CONFIG_USB_GADGET_VBUS_DRAW 2 105 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 106 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 107 #define CONFIG_G_DNL_MANUFACTURER "Advantech" 108 109 /* Networking Configs */ 110 #define CONFIG_CMD_PING 111 #define CONFIG_CMD_DHCP 112 #define CONFIG_CMD_MII 113 #define CONFIG_FEC_MXC 114 #define CONFIG_MII 115 #define IMX_FEC_BASE ENET_BASE_ADDR 116 #define CONFIG_FEC_XCV_TYPE RGMII 117 #define CONFIG_ETHPRIME "FEC" 118 #define CONFIG_FEC_MXC_PHYADDR 4 119 #define CONFIG_PHYLIB 120 #define CONFIG_PHY_ATHEROS 121 122 /* Serial Flash */ 123 #define CONFIG_CMD_SF 124 #ifdef CONFIG_CMD_SF 125 #define CONFIG_MXC_SPI 126 #define CONFIG_SF_DEFAULT_BUS 0 127 #define CONFIG_SF_DEFAULT_CS 0 128 #define CONFIG_SF_DEFAULT_SPEED 20000000 129 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 130 #endif 131 132 /* allow to overwrite serial and ethaddr */ 133 #define CONFIG_ENV_OVERWRITE 134 #define CONFIG_CONS_INDEX 1 135 #define CONFIG_BAUDRATE 115200 136 137 /* Command definition */ 138 #define CONFIG_CMD_BMODE 139 #define CONFIG_CMD_BOOTZ 140 #undef CONFIG_CMD_IMLS 141 142 #define CONFIG_LOADADDR 0x12000000 143 #define CONFIG_SYS_TEXT_BASE 0x17800000 144 145 #define CONFIG_EXTRA_ENV_SETTINGS \ 146 "script=boot.scr\0" \ 147 "image=/boot/uImage\0" \ 148 "uboot=u-boot.imx\0" \ 149 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 150 "fdt_addr=0x18000000\0" \ 151 "boot_fdt=yes\0" \ 152 "ip_dyn=yes\0" \ 153 "console=" CONFIG_CONSOLE_DEV "\0" \ 154 "fdt_high=0xffffffff\0" \ 155 "initrd_high=0xffffffff\0" \ 156 "sddev=0\0" \ 157 "emmcdev=1\0" \ 158 "partnum=1\0" \ 159 "update_sd_firmware=" \ 160 "if test ${ip_dyn} = yes; then " \ 161 "setenv get_cmd dhcp; " \ 162 "else " \ 163 "setenv get_cmd tftp; " \ 164 "fi; " \ 165 "if mmc dev ${mmcdev}; then " \ 166 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 167 "setexpr fw_sz ${filesize} / 0x200; " \ 168 "setexpr fw_sz ${fw_sz} + 1; " \ 169 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 170 "fi; " \ 171 "fi\0" \ 172 "update_sf_uboot=" \ 173 "if tftp $loadaddr $uboot; then " \ 174 "sf probe; " \ 175 "sf erase 0 0xC0000; " \ 176 "sf write $loadaddr 0x400 $filesize; " \ 177 "echo 'U-Boot upgraded. Please reset'; " \ 178 "fi\0" \ 179 "setargs=setenv bootargs console=${console},${baudrate} " \ 180 "root=/dev/${rootdev} rw rootwait cma=128M\0" \ 181 "loadbootscript=" \ 182 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \ 183 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \ 184 " source\0" \ 185 "loadimage=" \ 186 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ 187 "loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \ 188 "tryboot=" \ 189 "if run loadbootscript; then " \ 190 "run bootscript; " \ 191 "else " \ 192 "if run loadimage; then " \ 193 "run doboot; " \ 194 "fi; " \ 195 "fi;\0" \ 196 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \ 197 "run setargs; " \ 198 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 199 "if run loadfdt; then " \ 200 "bootm ${loadaddr} - ${fdt_addr}; " \ 201 "else " \ 202 "if test ${boot_fdt} = try; then " \ 203 "bootm; " \ 204 "else " \ 205 "echo WARN: Cannot load the DT; " \ 206 "fi; " \ 207 "fi; " \ 208 "else " \ 209 "bootm; " \ 210 "fi;\0" \ 211 "netargs=setenv bootargs console=${console},${baudrate} " \ 212 "root=/dev/nfs " \ 213 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 214 "netboot=echo Booting from net ...; " \ 215 "run netargs; " \ 216 "if test ${ip_dyn} = yes; then " \ 217 "setenv get_cmd dhcp; " \ 218 "else " \ 219 "setenv get_cmd tftp; " \ 220 "fi; " \ 221 "${get_cmd} ${image}; " \ 222 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 223 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 224 "bootm ${loadaddr} - ${fdt_addr}; " \ 225 "else " \ 226 "if test ${boot_fdt} = try; then " \ 227 "bootm; " \ 228 "else " \ 229 "echo WARN: Cannot load the DT; " \ 230 "fi; " \ 231 "fi; " \ 232 "else " \ 233 "bootm; " \ 234 "fi;\0" \ 235 236 #define CONFIG_BOOTCOMMAND \ 237 "usb start; " \ 238 "setenv dev usb; " \ 239 "setenv devnum 0; " \ 240 "setenv rootdev sda1; " \ 241 "run tryboot; " \ 242 \ 243 "setenv dev mmc; " \ 244 "setenv rootdev mmcblk0p1; " \ 245 \ 246 "setenv devnum ${sddev}; " \ 247 "if mmc dev ${devnum}; then " \ 248 "run tryboot; " \ 249 "setenv rootdev mmcblk1p1; " \ 250 "fi; " \ 251 \ 252 "setenv devnum ${emmcdev}; " \ 253 "if mmc dev ${devnum}; then " \ 254 "run tryboot; " \ 255 "fi; " \ 256 \ 257 "bmode usb; " \ 258 259 #define CONFIG_ARP_TIMEOUT 200UL 260 261 /* Miscellaneous configurable options */ 262 #define CONFIG_SYS_LONGHELP 263 #define CONFIG_SYS_HUSH_PARSER 264 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> " 265 #define CONFIG_AUTO_COMPLETE 266 267 /* Print Buffer Size */ 268 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 269 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 270 271 #define CONFIG_SYS_MEMTEST_START 0x10000000 272 #define CONFIG_SYS_MEMTEST_END 0x10010000 273 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 274 275 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 276 277 #define CONFIG_CMDLINE_EDITING 278 #define CONFIG_STACKSIZE (128 * 1024) 279 280 /* Physical Memory Map */ 281 #define CONFIG_NR_DRAM_BANKS 1 282 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 283 284 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 285 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 286 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 287 288 #define CONFIG_SYS_INIT_SP_OFFSET \ 289 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 290 #define CONFIG_SYS_INIT_SP_ADDR \ 291 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 292 293 /* FLASH and environment organization */ 294 #define CONFIG_SYS_NO_FLASH 295 296 #define CONFIG_ENV_IS_IN_SPI_FLASH 297 #define CONFIG_ENV_SIZE (8 * 1024) 298 #define CONFIG_ENV_OFFSET (768 * 1024) 299 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 300 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 301 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 302 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 303 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 304 305 #define CONFIG_OF_LIBFDT 306 307 #ifndef CONFIG_SYS_DCACHE_OFF 308 #define CONFIG_CMD_CACHE 309 #endif 310 311 #define CONFIG_SYS_FSL_USDHC_NUM 3 312 313 /* Framebuffer */ 314 #define CONFIG_VIDEO 315 #define CONFIG_VIDEO_IPUV3 316 #define CONFIG_CFB_CONSOLE 317 #define CONFIG_VGA_AS_SINGLE_DEVICE 318 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 319 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 320 #define CONFIG_VIDEO_BMP_RLE8 321 #define CONFIG_SPLASH_SCREEN 322 #define CONFIG_SPLASH_SCREEN_ALIGN 323 #define CONFIG_BMP_16BPP 324 #define CONFIG_VIDEO_LOGO 325 #define CONFIG_VIDEO_BMP_LOGO 326 #define CONFIG_IPUV3_CLK 260000000 327 #define CONFIG_IMX_HDMI 328 #define CONFIG_IMX_VIDEO_SKIP 329 330 #undef CONFIG_CMD_PCI 331 #ifdef CONFIG_CMD_PCI 332 #define CONFIG_PCI 333 #define CONFIG_PCI_PNP 334 #define CONFIG_PCI_SCAN_SHOW 335 #define CONFIG_PCIE_IMX 336 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 337 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5) 338 #endif 339 340 /* I2C Configs */ 341 #define CONFIG_CMD_I2C 342 #define CONFIG_SYS_I2C 343 #define CONFIG_SYS_I2C_MXC 344 #define CONFIG_SYS_I2C_SPEED 100000 345 #define CONFIG_SYS_I2C_MXC_I2C1 346 #define CONFIG_SYS_I2C_MXC_I2C2 347 #define CONFIG_SYS_I2C_MXC_I2C3 348 349 #endif /* __GE_BX50V3_CONFIG_H */ 350