1 /* 2 * Copyright (C) 2015 Timesys Corporation 3 * Copyright (C) 2015 General Electric Company 4 * Copyright (C) 2014 Advantech 5 * Copyright (C) 2012 Freescale Semiconductor, Inc. 6 * 7 * Configuration settings for the GE MX6Q Bx50v3 boards. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __GE_BX50V3_CONFIG_H 13 #define __GE_BX50V3_CONFIG_H 14 15 #include <asm/arch/imx-regs.h> 16 #include <asm/imx-common/gpio.h> 17 18 #define BX50V3_BOOTARGS_EXTRA 19 #if defined(CONFIG_TARGET_GE_B450V3) 20 #define CONFIG_BOARD_NAME "General Electric B450v3" 21 #elif defined(CONFIG_TARGET_GE_B650V3) 22 #define CONFIG_BOARD_NAME "General Electric B650v3" 23 #elif defined(CONFIG_TARGET_GE_B850V3) 24 #define CONFIG_BOARD_NAME "General Electric B850v3" 25 #undef BX50V3_BOOTARGS_EXTRA 26 #define BX50V3_BOOTARGS_EXTRA "video=DP-1:1024x768@60 " \ 27 "video=HDMI-A-1:1024x768@60 " 28 #else 29 #define CONFIG_BOARD_NAME "General Electric BA16 Generic" 30 #endif 31 32 #define CONFIG_MXC_UART_BASE UART3_BASE 33 #define CONSOLE_DEV "ttymxc2" 34 35 #define CONFIG_SUPPORT_EMMC_BOOT 36 37 38 #include "mx6_common.h" 39 #include <linux/sizes.h> 40 41 #define CONFIG_CMDLINE_TAG 42 #define CONFIG_SETUP_MEMORY_TAGS 43 #define CONFIG_INITRD_TAG 44 #define CONFIG_REVISION_TAG 45 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 46 47 #define CONFIG_MXC_GPIO 48 #define CONFIG_MXC_UART 49 50 #define CONFIG_MXC_OCOTP 51 52 /* SATA Configs */ 53 #ifdef CONFIG_CMD_SATA 54 #define CONFIG_DWC_AHSATA 55 #define CONFIG_SYS_SATA_MAX_DEVICE 1 56 #define CONFIG_DWC_AHSATA_PORT_ID 0 57 #define CONFIG_DWC_AHSATA_BASE_ADDR SATA_ARB_BASE_ADDR 58 #define CONFIG_LBA48 59 #define CONFIG_LIBATA 60 #endif 61 62 /* MMC Configs */ 63 #define CONFIG_FSL_ESDHC 64 #define CONFIG_FSL_USDHC 65 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 66 #define CONFIG_BOUNCE_BUFFER 67 68 /* USB Configs */ 69 #ifdef CONFIG_USB 70 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 71 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET 72 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 73 #define CONFIG_MXC_USB_FLAGS 0 74 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP 75 76 #define CONFIG_CI_UDC 77 #define CONFIG_USBD_HS 78 #define CONFIG_USB_GADGET_DUALSPEED 79 #define CONFIG_USB_GADGET 80 #define CONFIG_USB_GADGET_DOWNLOAD 81 #define CONFIG_USB_GADGET_MASS_STORAGE 82 #define CONFIG_USB_FUNCTION_MASS_STORAGE 83 #define CONFIG_USB_GADGET_VBUS_DRAW 2 84 #define CONFIG_G_DNL_VENDOR_NUM 0x0525 85 #define CONFIG_G_DNL_PRODUCT_NUM 0xa4a5 86 #define CONFIG_G_DNL_MANUFACTURER "Advantech" 87 #endif 88 89 /* Networking Configs */ 90 #ifdef CONFIG_NET 91 #define CONFIG_FEC_MXC 92 #define CONFIG_MII 93 #define IMX_FEC_BASE ENET_BASE_ADDR 94 #define CONFIG_FEC_XCV_TYPE RGMII 95 #define CONFIG_ETHPRIME "FEC" 96 #define CONFIG_FEC_MXC_PHYADDR 4 97 #define CONFIG_PHYLIB 98 #define CONFIG_PHY_ATHEROS 99 #endif 100 101 /* Serial Flash */ 102 #ifdef CONFIG_CMD_SF 103 #define CONFIG_MXC_SPI 104 #define CONFIG_SF_DEFAULT_BUS 0 105 #define CONFIG_SF_DEFAULT_CS 0 106 #define CONFIG_SF_DEFAULT_SPEED 20000000 107 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 108 #endif 109 110 /* allow to overwrite serial and ethaddr */ 111 #define CONFIG_ENV_OVERWRITE 112 #define CONFIG_CONS_INDEX 1 113 114 #define CONFIG_LOADADDR 0x12000000 115 #define CONFIG_SYS_TEXT_BASE 0x17800000 116 117 #define CONFIG_EXTRA_ENV_SETTINGS \ 118 "script=boot.scr\0" \ 119 "image=/boot/uImage\0" \ 120 "uboot=u-boot.imx\0" \ 121 "fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \ 122 "fdt_addr=0x18000000\0" \ 123 "boot_fdt=yes\0" \ 124 "ip_dyn=yes\0" \ 125 "console=" CONSOLE_DEV "\0" \ 126 "fdt_high=0xffffffff\0" \ 127 "initrd_high=0xffffffff\0" \ 128 "sddev=0\0" \ 129 "emmcdev=1\0" \ 130 "partnum=1\0" \ 131 "update_sd_firmware=" \ 132 "if test ${ip_dyn} = yes; then " \ 133 "setenv get_cmd dhcp; " \ 134 "else " \ 135 "setenv get_cmd tftp; " \ 136 "fi; " \ 137 "if mmc dev ${mmcdev}; then " \ 138 "if ${get_cmd} ${update_sd_firmware_filename}; then " \ 139 "setexpr fw_sz ${filesize} / 0x200; " \ 140 "setexpr fw_sz ${fw_sz} + 1; " \ 141 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \ 142 "fi; " \ 143 "fi\0" \ 144 "update_sf_uboot=" \ 145 "if tftp $loadaddr $uboot; then " \ 146 "sf probe; " \ 147 "sf erase 0 0xC0000; " \ 148 "sf write $loadaddr 0x400 $filesize; " \ 149 "echo 'U-Boot upgraded. Please reset'; " \ 150 "fi\0" \ 151 "setargs=setenv bootargs console=${console},${baudrate} " \ 152 "root=/dev/${rootdev} rw rootwait cma=128M " \ 153 BX50V3_BOOTARGS_EXTRA "\0" \ 154 "loadbootscript=" \ 155 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \ 156 "bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \ 157 " source\0" \ 158 "loadimage=" \ 159 "ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \ 160 "loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \ 161 "tryboot=" \ 162 "if run loadbootscript; then " \ 163 "run bootscript; " \ 164 "else " \ 165 "if run loadimage; then " \ 166 "run doboot; " \ 167 "fi; " \ 168 "fi;\0" \ 169 "doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \ 170 "run setargs; " \ 171 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 172 "if run loadfdt; then " \ 173 "bootm ${loadaddr} - ${fdt_addr}; " \ 174 "else " \ 175 "if test ${boot_fdt} = try; then " \ 176 "bootm; " \ 177 "else " \ 178 "echo WARN: Cannot load the DT; " \ 179 "fi; " \ 180 "fi; " \ 181 "else " \ 182 "bootm; " \ 183 "fi;\0" \ 184 "netargs=setenv bootargs console=${console},${baudrate} " \ 185 "root=/dev/nfs " \ 186 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \ 187 "netboot=echo Booting from net ...; " \ 188 "run netargs; " \ 189 "if test ${ip_dyn} = yes; then " \ 190 "setenv get_cmd dhcp; " \ 191 "else " \ 192 "setenv get_cmd tftp; " \ 193 "fi; " \ 194 "${get_cmd} ${image}; " \ 195 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \ 196 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \ 197 "bootm ${loadaddr} - ${fdt_addr}; " \ 198 "else " \ 199 "if test ${boot_fdt} = try; then " \ 200 "bootm; " \ 201 "else " \ 202 "echo WARN: Cannot load the DT; " \ 203 "fi; " \ 204 "fi; " \ 205 "else " \ 206 "bootm; " \ 207 "fi;\0" \ 208 209 #define CONFIG_MMCBOOTCOMMAND \ 210 "setenv dev mmc; " \ 211 "setenv rootdev mmcblk0p${partnum}; " \ 212 \ 213 "setenv devnum ${sddev}; " \ 214 "if mmc dev ${devnum}; then " \ 215 "run tryboot; " \ 216 "setenv rootdev mmcblk1p${partnum}; " \ 217 "fi; " \ 218 \ 219 "setenv devnum ${emmcdev}; " \ 220 "if mmc dev ${devnum}; then " \ 221 "run tryboot; " \ 222 "fi; " \ 223 224 #define CONFIG_USBBOOTCOMMAND \ 225 "usb start; " \ 226 "setenv dev usb; " \ 227 "setenv devnum 0; " \ 228 "setenv rootdev sda${partnum}; " \ 229 "run tryboot; " \ 230 \ 231 CONFIG_MMCBOOTCOMMAND \ 232 "bmode usb; " \ 233 234 #ifdef CONFIG_CMD_USB 235 #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND 236 #else 237 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND 238 #endif 239 240 #define CONFIG_ARP_TIMEOUT 200UL 241 242 /* Miscellaneous configurable options */ 243 #define CONFIG_SYS_LONGHELP 244 #define CONFIG_AUTO_COMPLETE 245 246 /* Print Buffer Size */ 247 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 248 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 249 250 #define CONFIG_SYS_MEMTEST_START 0x10000000 251 #define CONFIG_SYS_MEMTEST_END 0x10010000 252 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 253 254 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 255 256 #define CONFIG_CMDLINE_EDITING 257 258 /* Physical Memory Map */ 259 #define CONFIG_NR_DRAM_BANKS 1 260 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 261 262 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 263 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 264 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 265 266 #define CONFIG_SYS_INIT_SP_OFFSET \ 267 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 268 #define CONFIG_SYS_INIT_SP_ADDR \ 269 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 270 271 /* environment organization */ 272 #define CONFIG_ENV_IS_IN_SPI_FLASH 273 #define CONFIG_ENV_SIZE (8 * 1024) 274 #define CONFIG_ENV_OFFSET (768 * 1024) 275 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 276 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 277 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 278 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 279 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 280 281 #ifndef CONFIG_SYS_DCACHE_OFF 282 #endif 283 284 #define CONFIG_SYS_FSL_USDHC_NUM 3 285 286 /* Framebuffer */ 287 #ifdef CONFIG_VIDEO 288 #define CONFIG_VIDEO_IPUV3 289 #define CONFIG_VIDEO_BMP_RLE8 290 #define CONFIG_SPLASH_SCREEN 291 #define CONFIG_SPLASH_SCREEN_ALIGN 292 #define CONFIG_BMP_16BPP 293 #define CONFIG_VIDEO_LOGO 294 #define CONFIG_VIDEO_BMP_LOGO 295 #define CONFIG_IPUV3_CLK 260000000 296 #define CONFIG_IMX_HDMI 297 #define CONFIG_IMX_VIDEO_SKIP 298 #endif 299 300 #define CONFIG_PWM_IMX 301 #define CONFIG_IMX6_PWM_PER_CLK 66000000 302 303 #undef CONFIG_CMD_PCI 304 #ifdef CONFIG_CMD_PCI 305 #define CONFIG_PCI_SCAN_SHOW 306 #define CONFIG_PCIE_IMX 307 #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) 308 #define CONFIG_PCIE_IMX_POWER_GPIO IMX_GPIO_NR(1, 5) 309 #endif 310 311 /* I2C Configs */ 312 #define CONFIG_SYS_I2C 313 #define CONFIG_SYS_I2C_MXC 314 #define CONFIG_SYS_I2C_SPEED 100000 315 #define CONFIG_SYS_I2C_MXC_I2C1 316 #define CONFIG_SYS_I2C_MXC_I2C2 317 #define CONFIG_SYS_I2C_MXC_I2C3 318 319 #endif /* __GE_BX50V3_CONFIG_H */ 320