xref: /openbmc/u-boot/include/configs/ge_bx50v3.h (revision 2a6713b0)
1 /*
2  * Copyright (C) 2015 Timesys Corporation
3  * Copyright (C) 2015 General Electric Company
4  * Copyright (C) 2014 Advantech
5  * Copyright (C) 2012 Freescale Semiconductor, Inc.
6  *
7  * Configuration settings for the GE MX6Q Bx50v3 boards.
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #ifndef __GE_BX50V3_CONFIG_H
13 #define __GE_BX50V3_CONFIG_H
14 
15 #include <asm/arch/imx-regs.h>
16 #include <asm/imx-common/gpio.h>
17 
18 #define BX50V3_BOOTARGS_EXTRA
19 #if defined(CONFIG_TARGET_GE_B450V3)
20 #define CONFIG_BOARD_NAME	"General Electric B450v3"
21 #elif defined(CONFIG_TARGET_GE_B650V3)
22 #define CONFIG_BOARD_NAME	"General Electric B650v3"
23 #elif defined(CONFIG_TARGET_GE_B850V3)
24 #define CONFIG_BOARD_NAME	"General Electric B850v3"
25 #undef BX50V3_BOOTARGS_EXTRA
26 #define BX50V3_BOOTARGS_EXTRA	"video=DP-1:1024x768@60 " \
27 				"video=HDMI-A-1:1024x768@60 "
28 #else
29 #define CONFIG_BOARD_NAME	"General Electric BA16 Generic"
30 #endif
31 
32 #define CONFIG_MXC_UART_BASE	UART3_BASE
33 #define CONSOLE_DEV	"ttymxc2"
34 
35 #define CONFIG_SUPPORT_EMMC_BOOT
36 
37 
38 #include "mx6_common.h"
39 #include <linux/sizes.h>
40 
41 #define CONFIG_CMDLINE_TAG
42 #define CONFIG_SETUP_MEMORY_TAGS
43 #define CONFIG_INITRD_TAG
44 #define CONFIG_REVISION_TAG
45 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
46 
47 #define CONFIG_BOARD_EARLY_INIT_F
48 #define CONFIG_BOARD_LATE_INIT
49 
50 #define CONFIG_MXC_GPIO
51 #define CONFIG_MXC_UART
52 
53 #define CONFIG_CMD_FUSE
54 #define CONFIG_MXC_OCOTP
55 
56 /* SATA Configs */
57 #ifdef CONFIG_CMD_SATA
58 #define CONFIG_DWC_AHSATA
59 #define CONFIG_SYS_SATA_MAX_DEVICE	1
60 #define CONFIG_DWC_AHSATA_PORT_ID	0
61 #define CONFIG_DWC_AHSATA_BASE_ADDR	SATA_ARB_BASE_ADDR
62 #define CONFIG_LBA48
63 #define CONFIG_LIBATA
64 #endif
65 
66 /* MMC Configs */
67 #define CONFIG_FSL_ESDHC
68 #define CONFIG_FSL_USDHC
69 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
70 #define CONFIG_GENERIC_MMC
71 #define CONFIG_BOUNCE_BUFFER
72 #define CONFIG_DOS_PARTITION
73 
74 /* USB Configs */
75 #ifdef CONFIG_USB
76 #define CONFIG_USB_EHCI
77 #define CONFIG_USB_EHCI_MX6
78 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
79 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
80 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
81 #define CONFIG_MXC_USB_FLAGS	0
82 #define CONFIG_SYS_USB_EVENT_POLL_VIA_CONTROL_EP
83 
84 #define CONFIG_CI_UDC
85 #define CONFIG_USBD_HS
86 #define CONFIG_USB_GADGET_DUALSPEED
87 #define CONFIG_USB_GADGET
88 #define CONFIG_USB_GADGET_DOWNLOAD
89 #define CONFIG_USB_GADGET_MASS_STORAGE
90 #define CONFIG_USB_FUNCTION_MASS_STORAGE
91 #define CONFIG_USB_GADGET_VBUS_DRAW 2
92 #define CONFIG_G_DNL_VENDOR_NUM   0x0525
93 #define CONFIG_G_DNL_PRODUCT_NUM  0xa4a5
94 #define CONFIG_G_DNL_MANUFACTURER "Advantech"
95 #endif
96 
97 /* Networking Configs */
98 #ifdef CONFIG_NET
99 #define CONFIG_FEC_MXC
100 #define CONFIG_MII
101 #define IMX_FEC_BASE			ENET_BASE_ADDR
102 #define CONFIG_FEC_XCV_TYPE		RGMII
103 #define CONFIG_ETHPRIME		"FEC"
104 #define CONFIG_FEC_MXC_PHYADDR		4
105 #define CONFIG_PHYLIB
106 #define CONFIG_PHY_ATHEROS
107 #endif
108 
109 /* Serial Flash */
110 #ifdef CONFIG_CMD_SF
111 #define CONFIG_MXC_SPI
112 #define CONFIG_SF_DEFAULT_BUS		0
113 #define CONFIG_SF_DEFAULT_CS		0
114 #define CONFIG_SF_DEFAULT_SPEED	20000000
115 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
116 #endif
117 
118 /* allow to overwrite serial and ethaddr */
119 #define CONFIG_ENV_OVERWRITE
120 #define CONFIG_CONS_INDEX	1
121 #define CONFIG_BAUDRATE	115200
122 
123 /* Command definition */
124 #define CONFIG_CMD_BMODE
125 
126 #define CONFIG_LOADADDR	0x12000000
127 #define CONFIG_SYS_TEXT_BASE	0x17800000
128 
129 #define CONFIG_EXTRA_ENV_SETTINGS \
130 	"script=boot.scr\0" \
131 	"image=/boot/uImage\0" \
132 	"uboot=u-boot.imx\0" \
133 	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
134 	"fdt_addr=0x18000000\0" \
135 	"boot_fdt=yes\0" \
136 	"ip_dyn=yes\0" \
137 	"console=" CONSOLE_DEV "\0" \
138 	"fdt_high=0xffffffff\0"	  \
139 	"initrd_high=0xffffffff\0" \
140 	"sddev=0\0" \
141 	"emmcdev=1\0" \
142 	"partnum=1\0" \
143 	"update_sd_firmware=" \
144 		"if test ${ip_dyn} = yes; then " \
145 			"setenv get_cmd dhcp; " \
146 		"else " \
147 			"setenv get_cmd tftp; " \
148 		"fi; " \
149 		"if mmc dev ${mmcdev}; then "	\
150 			"if ${get_cmd} ${update_sd_firmware_filename}; then " \
151 				"setexpr fw_sz ${filesize} / 0x200; " \
152 				"setexpr fw_sz ${fw_sz} + 1; "	\
153 				"mmc write ${loadaddr} 0x2 ${fw_sz}; " \
154 			"fi; "	\
155 		"fi\0" \
156 	"update_sf_uboot=" \
157 		"if tftp $loadaddr $uboot; then " \
158 			"sf probe; " \
159 			"sf erase 0 0xC0000; " \
160 			"sf write $loadaddr 0x400 $filesize; " \
161 			"echo 'U-Boot upgraded. Please reset'; " \
162 		"fi\0" \
163 	"setargs=setenv bootargs console=${console},${baudrate} " \
164 		"root=/dev/${rootdev} rw rootwait cma=128M " \
165 		BX50V3_BOOTARGS_EXTRA "\0" \
166 	"loadbootscript=" \
167 		"ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${script};\0" \
168 	"bootscript=echo Running bootscript from ${dev}:${devnum}:${partnum};" \
169 		" source\0" \
170 	"loadimage=" \
171 		"ext2load ${dev} ${devnum}:${partnum} ${loadaddr} ${image}\0" \
172 	"loadfdt=ext2load ${dev} ${devnum}:${partnum} ${fdt_addr} ${fdt_file}\0" \
173 	"tryboot=" \
174 		"if run loadbootscript; then " \
175 			"run bootscript; " \
176 		"else " \
177 			"if run loadimage; then " \
178 				"run doboot; " \
179 			"fi; " \
180 		"fi;\0" \
181 	"doboot=echo Booting from ${dev}:${devnum}:${partnum} ...; " \
182 		"run setargs; " \
183 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
184 			"if run loadfdt; then " \
185 				"bootm ${loadaddr} - ${fdt_addr}; " \
186 			"else " \
187 				"if test ${boot_fdt} = try; then " \
188 					"bootm; " \
189 				"else " \
190 					"echo WARN: Cannot load the DT; " \
191 				"fi; " \
192 			"fi; " \
193 		"else " \
194 			"bootm; " \
195 		"fi;\0" \
196 	"netargs=setenv bootargs console=${console},${baudrate} " \
197 		"root=/dev/nfs " \
198 		"ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
199 	"netboot=echo Booting from net ...; " \
200 		"run netargs; " \
201 		"if test ${ip_dyn} = yes; then " \
202 			"setenv get_cmd dhcp; " \
203 		"else " \
204 			"setenv get_cmd tftp; " \
205 		"fi; " \
206 		"${get_cmd} ${image}; " \
207 		"if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
208 			"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
209 				"bootm ${loadaddr} - ${fdt_addr}; " \
210 			"else " \
211 				"if test ${boot_fdt} = try; then " \
212 					"bootm; " \
213 				"else " \
214 					"echo WARN: Cannot load the DT; " \
215 				"fi; " \
216 			"fi; " \
217 		"else " \
218 			"bootm; " \
219 		"fi;\0" \
220 
221 #define CONFIG_MMCBOOTCOMMAND \
222 	"setenv dev mmc; " \
223 	"setenv rootdev mmcblk0p${partnum}; " \
224 	\
225 	"setenv devnum ${sddev}; " \
226 	"if mmc dev ${devnum}; then " \
227 		"run tryboot; " \
228 		"setenv rootdev mmcblk1p${partnum}; " \
229 	"fi; " \
230 	\
231 	"setenv devnum ${emmcdev}; " \
232 	"if mmc dev ${devnum}; then " \
233 		"run tryboot; " \
234 	"fi; " \
235 
236 #define CONFIG_USBBOOTCOMMAND \
237 	"usb start; " \
238 	"setenv dev usb; " \
239 	"setenv devnum 0; " \
240 	"setenv rootdev sda${partnum}; " \
241 	"run tryboot; " \
242 	\
243 	CONFIG_MMCBOOTCOMMAND \
244 	"bmode usb; " \
245 
246 #ifdef CONFIG_CMD_USB
247 #define CONFIG_BOOTCOMMAND CONFIG_USBBOOTCOMMAND
248 #else
249 #define CONFIG_BOOTCOMMAND CONFIG_MMCBOOTCOMMAND
250 #endif
251 
252 #define CONFIG_ARP_TIMEOUT     200UL
253 
254 /* Miscellaneous configurable options */
255 #define CONFIG_SYS_LONGHELP
256 #define CONFIG_AUTO_COMPLETE
257 
258 /* Print Buffer Size */
259 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
260 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
261 
262 #define CONFIG_SYS_MEMTEST_START       0x10000000
263 #define CONFIG_SYS_MEMTEST_END         0x10010000
264 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
265 
266 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
267 
268 #define CONFIG_CMDLINE_EDITING
269 #define CONFIG_STACKSIZE               (128 * 1024)
270 
271 /* Physical Memory Map */
272 #define CONFIG_NR_DRAM_BANKS           1
273 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
274 
275 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
276 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
277 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
278 
279 #define CONFIG_SYS_INIT_SP_OFFSET \
280 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
281 #define CONFIG_SYS_INIT_SP_ADDR \
282 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
283 
284 /* FLASH and environment organization */
285 #define CONFIG_SYS_NO_FLASH
286 
287 #define CONFIG_ENV_IS_IN_SPI_FLASH
288 #define CONFIG_ENV_SIZE		(8 * 1024)
289 #define CONFIG_ENV_OFFSET		(768 * 1024)
290 #define CONFIG_ENV_SECT_SIZE		(64 * 1024)
291 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
292 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
293 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
294 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
295 
296 #ifndef CONFIG_SYS_DCACHE_OFF
297 #endif
298 
299 #define CONFIG_SYS_FSL_USDHC_NUM	3
300 
301 /* Framebuffer */
302 #ifdef CONFIG_VIDEO
303 #define CONFIG_VIDEO_IPUV3
304 #define CONFIG_VIDEO_BMP_RLE8
305 #define CONFIG_SPLASH_SCREEN
306 #define CONFIG_SPLASH_SCREEN_ALIGN
307 #define CONFIG_BMP_16BPP
308 #define CONFIG_VIDEO_LOGO
309 #define CONFIG_VIDEO_BMP_LOGO
310 #define CONFIG_IPUV3_CLK 260000000
311 #define CONFIG_IMX_HDMI
312 #define CONFIG_IMX_VIDEO_SKIP
313 #endif
314 
315 #define CONFIG_PWM_IMX
316 #define CONFIG_IMX6_PWM_PER_CLK	66000000
317 
318 #undef CONFIG_CMD_PCI
319 #ifdef CONFIG_CMD_PCI
320 #define CONFIG_PCI_SCAN_SHOW
321 #define CONFIG_PCIE_IMX
322 #define CONFIG_PCIE_IMX_PERST_GPIO	IMX_GPIO_NR(7, 12)
323 #define CONFIG_PCIE_IMX_POWER_GPIO	IMX_GPIO_NR(1, 5)
324 #endif
325 
326 /* I2C Configs */
327 #define CONFIG_SYS_I2C
328 #define CONFIG_SYS_I2C_MXC
329 #define CONFIG_SYS_I2C_SPEED		  100000
330 #define CONFIG_SYS_I2C_MXC_I2C1
331 #define CONFIG_SYS_I2C_MXC_I2C2
332 #define CONFIG_SYS_I2C_MXC_I2C3
333 
334 #endif	/* __GE_BX50V3_CONFIG_H */
335