xref: /openbmc/u-boot/include/configs/flea3.h (revision e3f44f5c)
1 /*
2  * (C) Copyright 2011, Stefano Babic <sbabic@denx.de>
3  *
4  * (C) Copyright 2008-2010 Freescale Semiconductor, Inc.
5  *
6  * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de>
7  *
8  * Configuration for the flea3 board.
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __CONFIG_H
14 #define __CONFIG_H
15 
16 #include <asm/arch/imx-regs.h>
17 
18  /* High Level Configuration Options */
19 #define CONFIG_MX35
20 
21 #define CONFIG_SYS_DCACHE_OFF
22 
23 #define CONFIG_MACH_TYPE		MACH_TYPE_FLEA3
24 
25 /* Set TEXT at the beginning of the NOR flash */
26 #define CONFIG_SYS_TEXT_BASE	0xA0000000
27 
28 /* This is required to setup the ESDC controller */
29 
30 #define CONFIG_CMDLINE_TAG		/* enable passing of ATAGs */
31 #define CONFIG_REVISION_TAG
32 #define CONFIG_SETUP_MEMORY_TAGS
33 #define CONFIG_INITRD_TAG
34 
35 /*
36  * Size of malloc() pool
37  */
38 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + 1024 * 1024)
39 
40 /*
41  * Hardware drivers
42  */
43 #define CONFIG_SYS_I2C
44 #define CONFIG_SYS_I2C_MXC
45 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
46 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
47 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
48 #define CONFIG_SYS_SPD_BUS_NUM		2 /* I2C3 */
49 #define CONFIG_SYS_MXC_I2C3_SLAVE	0xfe
50 #define CONFIG_MXC_SPI
51 #define CONFIG_MXC_GPIO
52 
53 /*
54  * UART (console)
55  */
56 #define CONFIG_MXC_UART
57 #define CONFIG_MXC_UART_BASE	UART3_BASE
58 
59 /* allow to overwrite serial and ethaddr */
60 #define CONFIG_ENV_OVERWRITE
61 #define CONFIG_CONS_INDEX	1
62 
63 /*
64  * Command definition
65  */
66 #define CONFIG_BOOTP_SUBNETMASK
67 #define CONFIG_BOOTP_GATEWAY
68 #define CONFIG_BOOTP_DNS
69 
70 #define CONFIG_CMD_NAND
71 
72 #define CONFIG_NET_RETRY_COUNT	100
73 
74 
75 #define CONFIG_LOADADDR		0x80800000	/* loadaddr env var */
76 
77 /*
78  * Ethernet on SOC (FEC)
79  */
80 #define CONFIG_FEC_MXC
81 #define IMX_FEC_BASE	FEC_BASE_ADDR
82 #define CONFIG_PHYLIB
83 #define CONFIG_PHY_MICREL
84 #define CONFIG_FEC_MXC_PHYADDR	0x1
85 
86 #define CONFIG_MII
87 
88 #define CONFIG_ARP_TIMEOUT	200UL
89 
90 /*
91  * Miscellaneous configurable options
92  */
93 #define CONFIG_SYS_LONGHELP	/* undef to save memory */
94 #define CONFIG_CMDLINE_EDITING
95 
96 #define CONFIG_AUTO_COMPLETE
97 #define CONFIG_SYS_CBSIZE	512	/* Console I/O Buffer Size */
98 /* Print Buffer Size */
99 #define CONFIG_SYS_MAXARGS	32	/* max number of command args */
100 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */
101 
102 #define CONFIG_SYS_MEMTEST_START	0	/* memtest works on */
103 #define CONFIG_SYS_MEMTEST_END		0x10000
104 
105 #define CONFIG_SYS_LOAD_ADDR		CONFIG_LOADADDR
106 
107 /*
108  * Physical Memory Map
109  */
110 #define CONFIG_NR_DRAM_BANKS	1
111 #define PHYS_SDRAM_1		CSD0_BASE_ADDR
112 #define PHYS_SDRAM_1_SIZE	(128 * 1024 * 1024)
113 
114 #define CONFIG_SYS_SDRAM_BASE		CSD0_BASE_ADDR
115 #define CONFIG_SYS_INIT_RAM_ADDR	(IRAM_BASE_ADDR + 0x10000)
116 #define CONFIG_SYS_INIT_RAM_SIZE		(IRAM_SIZE / 2)
117 #define CONFIG_SYS_GBL_DATA_OFFSET	(CONFIG_SYS_INIT_RAM_SIZE - \
118 					GENERATED_GBL_DATA_SIZE)
119 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
120 					CONFIG_SYS_GBL_DATA_OFFSET)
121 
122 /*
123  * MTD Command for mtdparts
124  */
125 #define CONFIG_MTD_DEVICE
126 #define CONFIG_FLASH_CFI_MTD
127 #define CONFIG_MTD_PARTITIONS
128 #define MTDIDS_DEFAULT		"nand0=mxc_nand,nor0=physmap-flash.0"
129 #define MTDPARTS_DEFAULT	"mtdparts=mxc_nand:50m(root1)," \
130 				"32m(rootfb)," \
131 				"64m(pcache)," \
132 				"64m(app1)," \
133 				"10m(app2),-(spool);" \
134 				"physmap-flash.0:512k(u-boot),64k(env1)," \
135 				"64k(env2),3776k(kernel1),3776k(kernel2)"
136 
137 /*
138  * FLASH and environment organization
139  */
140 #define CONFIG_SYS_FLASH_BASE		CS0_BASE_ADDR
141 #define CONFIG_SYS_MAX_FLASH_BANKS 1	/* max number of memory banks */
142 #define CONFIG_SYS_MAX_FLASH_SECT 512	/* max number of sectors on one chip */
143 /* Monitor at beginning of flash */
144 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SYS_FLASH_BASE
145 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
146 
147 #define CONFIG_ENV_SECT_SIZE	(64 * 1024)
148 #define CONFIG_ENV_SIZE		CONFIG_ENV_SECT_SIZE
149 
150 /* Address and size of Redundant Environment Sector	*/
151 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
152 #define CONFIG_ENV_SIZE_REDUND	CONFIG_ENV_SIZE
153 
154 #define CONFIG_ENV_ADDR		(CONFIG_SYS_MONITOR_BASE + \
155 				CONFIG_SYS_MONITOR_LEN)
156 
157 /*
158  * CFI FLASH driver setup
159  */
160 #define CONFIG_SYS_FLASH_CFI		/* Flash memory is CFI compliant */
161 #define CONFIG_FLASH_CFI_DRIVER
162 
163 /* A non-standard buffered write algorithm */
164 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE	/* faster */
165 #define CONFIG_SYS_FLASH_PROTECTION	/* Use hardware sector protection */
166 
167 /*
168  * NAND FLASH driver setup
169  */
170 #define CONFIG_NAND_MXC
171 #define CONFIG_MXC_NAND_REGS_BASE	(NFC_BASE_ADDR)
172 #define CONFIG_SYS_MAX_NAND_DEVICE	1
173 #define CONFIG_SYS_NAND_BASE		(NFC_BASE_ADDR)
174 #define CONFIG_MXC_NAND_HWECC
175 #define CONFIG_SYS_NAND_LARGEPAGE
176 
177 /*
178  * Default environment and default scripts
179  * to update uboot and load kernel
180  */
181 
182 #define CONFIG_HOSTNAME flea3
183 #define	CONFIG_EXTRA_ENV_SETTINGS					\
184 	"netdev=eth0\0"							\
185 	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
186 		"nfsroot=${serverip}:${rootpath}\0"			\
187 	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
188 	"addip_sta=setenv bootargs ${bootargs} "			\
189 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
190 		":${hostname}:${netdev}:off panic=1\0"			\
191 	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
192 	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
193 		"else run addip_sta;fi\0"				\
194 	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
195 	"addtty=setenv bootargs ${bootargs}"				\
196 		" console=ttymxc2,${baudrate}\0"			\
197 	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
198 	"loadaddr=80800000\0"						\
199 	"kernel_addr_r=80800000\0"					\
200 	"hostname=" __stringify(CONFIG_HOSTNAME) "\0"			\
201 	"bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0"		\
202 	"ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0"	\
203 	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
204 		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
205 	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
206 		"bootm ${kernel_addr}\0"				\
207 	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
208 		"run nfsargs addip addtty addmtd addmisc;"		\
209 		"bootm ${kernel_addr_r}\0"				\
210 	"net_self_load=tftp ${kernel_addr_r} ${bootfile};"		\
211 		"tftp ${ramdisk_addr_r} ${ramdisk_file};\0"		\
212 	"net_self=if run net_self_load;then "				\
213 		"run ramargs addip addtty addmtd addmisc;"		\
214 		"bootm ${kernel_addr_r} ${ramdisk_addr_r};"		\
215 		"else echo Images not loades;fi\0"			\
216 	"u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0"		\
217 	"load=tftp ${loadaddr} ${u-boot}\0"				\
218 	"uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0"		\
219 	"update=protect off ${uboot_addr} +80000;"			\
220 		"erase ${uboot_addr} +80000;"				\
221 		"cp.b ${loadaddr} ${uboot_addr} ${filesize}\0"		\
222 	"upd=if run load;then echo Updating u-boot;if run update;"	\
223 		"then echo U-Boot updated;"				\
224 			"else echo Error updating u-boot !;"		\
225 			"echo Board without bootloader !!;"		\
226 		"fi;"							\
227 		"else echo U-Boot not downloaded..exiting;fi\0"		\
228 	"bootcmd=run net_nfs\0"
229 
230 #endif				/* __CONFIG_H */
231