1 /* 2 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de> 3 * 4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5 * 6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 7 * 8 * Configuration for the flea3 board. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/arch/imx-regs.h> 17 18 /* High Level Configuration Options */ 19 #define CONFIG_MX35 20 21 #define CONFIG_SYS_DCACHE_OFF 22 #define CONFIG_SYS_CACHELINE_SIZE 32 23 24 #define CONFIG_DISPLAY_CPUINFO 25 #define CONFIG_SYS_GENERIC_BOARD 26 27 /* Only in case the value is not present in mach-types.h */ 28 #ifndef MACH_TYPE_FLEA3 29 #define MACH_TYPE_FLEA3 3668 30 #endif 31 32 #define CONFIG_MACH_TYPE MACH_TYPE_FLEA3 33 34 /* Set TEXT at the beginning of the NOR flash */ 35 #define CONFIG_SYS_TEXT_BASE 0xA0000000 36 37 /* This is required to setup the ESDC controller */ 38 #define CONFIG_BOARD_EARLY_INIT_F 39 40 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 41 #define CONFIG_REVISION_TAG 42 #define CONFIG_SETUP_MEMORY_TAGS 43 #define CONFIG_INITRD_TAG 44 45 /* 46 * Size of malloc() pool 47 */ 48 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 49 50 /* 51 * Hardware drivers 52 */ 53 #define CONFIG_SYS_I2C 54 #define CONFIG_SYS_I2C_MXC 55 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 56 #define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */ 57 #define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe 58 #define CONFIG_MXC_SPI 59 #define CONFIG_MXC_GPIO 60 61 /* 62 * UART (console) 63 */ 64 #define CONFIG_MXC_UART 65 #define CONFIG_MXC_UART_BASE UART3_BASE 66 67 /* allow to overwrite serial and ethaddr */ 68 #define CONFIG_ENV_OVERWRITE 69 #define CONFIG_CONS_INDEX 1 70 #define CONFIG_BAUDRATE 115200 71 72 /* 73 * Command definition 74 */ 75 76 #include <config_cmd_default.h> 77 78 #define CONFIG_CMD_PING 79 #define CONFIG_CMD_DHCP 80 #define CONFIG_BOOTP_SUBNETMASK 81 #define CONFIG_BOOTP_GATEWAY 82 #define CONFIG_BOOTP_DNS 83 84 #define CONFIG_CMD_NAND 85 #define CONFIG_CMD_CACHE 86 87 #define CONFIG_CMD_I2C 88 #define CONFIG_CMD_SPI 89 #define CONFIG_CMD_MII 90 #define CONFIG_CMD_NET 91 #define CONFIG_NET_RETRY_COUNT 100 92 93 #define CONFIG_BOOTDELAY 3 94 95 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 96 97 98 /* 99 * Ethernet on SOC (FEC) 100 */ 101 #define CONFIG_FEC_MXC 102 #define IMX_FEC_BASE FEC_BASE_ADDR 103 #define CONFIG_PHYLIB 104 #define CONFIG_PHY_MICREL 105 #define CONFIG_FEC_MXC_PHYADDR 0x1 106 107 #define CONFIG_MII 108 109 #define CONFIG_ARP_TIMEOUT 200UL 110 111 /* 112 * Miscellaneous configurable options 113 */ 114 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 115 #define CONFIG_SYS_PROMPT "flea3 U-Boot > " 116 #define CONFIG_CMDLINE_EDITING 117 #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ 118 119 #define CONFIG_AUTO_COMPLETE 120 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 121 /* Print Buffer Size */ 122 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 123 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 124 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 125 126 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 127 #define CONFIG_SYS_MEMTEST_END 0x10000 128 129 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 130 131 /* 132 * Physical Memory Map 133 */ 134 #define CONFIG_NR_DRAM_BANKS 1 135 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 136 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 137 138 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 139 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) 140 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) 141 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 142 GENERATED_GBL_DATA_SIZE) 143 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 144 CONFIG_SYS_GBL_DATA_OFFSET) 145 146 /* 147 * MTD Command for mtdparts 148 */ 149 #define CONFIG_CMD_MTDPARTS 150 #define CONFIG_MTD_DEVICE 151 #define CONFIG_FLASH_CFI_MTD 152 #define CONFIG_MTD_PARTITIONS 153 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 154 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \ 155 "32m(rootfb)," \ 156 "64m(pcache)," \ 157 "64m(app1)," \ 158 "10m(app2),-(spool);" \ 159 "physmap-flash.0:512k(u-boot),64k(env1)," \ 160 "64k(env2),3776k(kernel1),3776k(kernel2)" 161 162 /* 163 * FLASH and environment organization 164 */ 165 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 166 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 167 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 168 /* Monitor at beginning of flash */ 169 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 170 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 171 172 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 173 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 174 175 /* Address and size of Redundant Environment Sector */ 176 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 177 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 178 179 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 180 CONFIG_SYS_MONITOR_LEN) 181 182 #define CONFIG_ENV_IS_IN_FLASH 183 184 /* 185 * CFI FLASH driver setup 186 */ 187 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 188 #define CONFIG_FLASH_CFI_DRIVER 189 190 /* A non-standard buffered write algorithm */ 191 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 192 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 193 194 /* 195 * NAND FLASH driver setup 196 */ 197 #define CONFIG_NAND_MXC 198 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 199 #define CONFIG_SYS_MAX_NAND_DEVICE 1 200 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 201 #define CONFIG_MXC_NAND_HWECC 202 #define CONFIG_SYS_NAND_LARGEPAGE 203 204 /* 205 * Default environment and default scripts 206 * to update uboot and load kernel 207 */ 208 209 #define CONFIG_HOSTNAME flea3 210 #define CONFIG_EXTRA_ENV_SETTINGS \ 211 "netdev=eth0\0" \ 212 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 213 "nfsroot=${serverip}:${rootpath}\0" \ 214 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 215 "addip_sta=setenv bootargs ${bootargs} " \ 216 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 217 ":${hostname}:${netdev}:off panic=1\0" \ 218 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 219 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 220 "else run addip_sta;fi\0" \ 221 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 222 "addtty=setenv bootargs ${bootargs}" \ 223 " console=ttymxc2,${baudrate}\0" \ 224 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 225 "loadaddr=80800000\0" \ 226 "kernel_addr_r=80800000\0" \ 227 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 228 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 229 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 230 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 231 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 232 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 233 "bootm ${kernel_addr}\0" \ 234 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 235 "run nfsargs addip addtty addmtd addmisc;" \ 236 "bootm ${kernel_addr_r}\0" \ 237 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 238 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 239 "net_self=if run net_self_load;then " \ 240 "run ramargs addip addtty addmtd addmisc;" \ 241 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 242 "else echo Images not loades;fi\0" \ 243 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 244 "load=tftp ${loadaddr} ${u-boot}\0" \ 245 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 246 "update=protect off ${uboot_addr} +40000;" \ 247 "erase ${uboot_addr} +40000;" \ 248 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 249 "upd=if run load;then echo Updating u-boot;if run update;" \ 250 "then echo U-Boot updated;" \ 251 "else echo Error updating u-boot !;" \ 252 "echo Board without bootloader !!;" \ 253 "fi;" \ 254 "else echo U-Boot not downloaded..exiting;fi\0" \ 255 "bootcmd=run net_nfs\0" 256 257 #endif /* __CONFIG_H */ 258