1 /* 2 * (C) Copyright 2011, Stefano Babic <sbabic@denx.de> 3 * 4 * (C) Copyright 2008-2010 Freescale Semiconductor, Inc. 5 * 6 * Copyright (C) 2007, Guennadi Liakhovetski <lg@denx.de> 7 * 8 * Configuration for the flea3 board. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __CONFIG_H 14 #define __CONFIG_H 15 16 #include <asm/arch/imx-regs.h> 17 18 /* High Level Configuration Options */ 19 #define CONFIG_MX35 20 21 #define CONFIG_SYS_DCACHE_OFF 22 #define CONFIG_SYS_CACHELINE_SIZE 32 23 24 #define CONFIG_DISPLAY_CPUINFO 25 #define CONFIG_SYS_GENERIC_BOARD 26 27 /* Only in case the value is not present in mach-types.h */ 28 #ifndef MACH_TYPE_FLEA3 29 #define MACH_TYPE_FLEA3 3668 30 #endif 31 32 #define CONFIG_MACH_TYPE MACH_TYPE_FLEA3 33 34 /* Set TEXT at the beginning of the NOR flash */ 35 #define CONFIG_SYS_TEXT_BASE 0xA0000000 36 37 /* This is required to setup the ESDC controller */ 38 #define CONFIG_BOARD_EARLY_INIT_F 39 40 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 41 #define CONFIG_REVISION_TAG 42 #define CONFIG_SETUP_MEMORY_TAGS 43 #define CONFIG_INITRD_TAG 44 45 /* 46 * Size of malloc() pool 47 */ 48 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 1024 * 1024) 49 50 /* 51 * Hardware drivers 52 */ 53 #define CONFIG_SYS_I2C 54 #define CONFIG_SYS_I2C_MXC 55 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 56 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 57 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 58 #define CONFIG_SYS_SPD_BUS_NUM 2 /* I2C3 */ 59 #define CONFIG_SYS_MXC_I2C3_SLAVE 0xfe 60 #define CONFIG_MXC_SPI 61 #define CONFIG_MXC_GPIO 62 63 /* 64 * UART (console) 65 */ 66 #define CONFIG_MXC_UART 67 #define CONFIG_MXC_UART_BASE UART3_BASE 68 69 /* allow to overwrite serial and ethaddr */ 70 #define CONFIG_ENV_OVERWRITE 71 #define CONFIG_CONS_INDEX 1 72 #define CONFIG_BAUDRATE 115200 73 74 /* 75 * Command definition 76 */ 77 #define CONFIG_CMD_PING 78 #define CONFIG_CMD_DHCP 79 #define CONFIG_BOOTP_SUBNETMASK 80 #define CONFIG_BOOTP_GATEWAY 81 #define CONFIG_BOOTP_DNS 82 83 #define CONFIG_CMD_NAND 84 #define CONFIG_CMD_CACHE 85 86 #define CONFIG_CMD_I2C 87 #define CONFIG_CMD_SPI 88 #define CONFIG_CMD_MII 89 #define CONFIG_NET_RETRY_COUNT 100 90 91 #define CONFIG_BOOTDELAY 3 92 93 #define CONFIG_LOADADDR 0x80800000 /* loadaddr env var */ 94 95 96 /* 97 * Ethernet on SOC (FEC) 98 */ 99 #define CONFIG_FEC_MXC 100 #define IMX_FEC_BASE FEC_BASE_ADDR 101 #define CONFIG_PHYLIB 102 #define CONFIG_PHY_MICREL 103 #define CONFIG_FEC_MXC_PHYADDR 0x1 104 105 #define CONFIG_MII 106 107 #define CONFIG_ARP_TIMEOUT 200UL 108 109 /* 110 * Miscellaneous configurable options 111 */ 112 #define CONFIG_SYS_LONGHELP /* undef to save memory */ 113 #define CONFIG_CMDLINE_EDITING 114 #define CONFIG_SYS_HUSH_PARSER /* Use the HUSH parser */ 115 116 #define CONFIG_AUTO_COMPLETE 117 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */ 118 /* Print Buffer Size */ 119 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 120 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 121 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE /* Boot Argument Buffer Size */ 122 123 #define CONFIG_SYS_MEMTEST_START 0 /* memtest works on */ 124 #define CONFIG_SYS_MEMTEST_END 0x10000 125 126 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR 127 128 /* 129 * Physical Memory Map 130 */ 131 #define CONFIG_NR_DRAM_BANKS 1 132 #define PHYS_SDRAM_1 CSD0_BASE_ADDR 133 #define PHYS_SDRAM_1_SIZE (128 * 1024 * 1024) 134 135 #define CONFIG_SYS_SDRAM_BASE CSD0_BASE_ADDR 136 #define CONFIG_SYS_INIT_RAM_ADDR (IRAM_BASE_ADDR + 0x10000) 137 #define CONFIG_SYS_INIT_RAM_SIZE (IRAM_SIZE / 2) 138 #define CONFIG_SYS_GBL_DATA_OFFSET (CONFIG_SYS_INIT_RAM_SIZE - \ 139 GENERATED_GBL_DATA_SIZE) 140 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \ 141 CONFIG_SYS_GBL_DATA_OFFSET) 142 143 /* 144 * MTD Command for mtdparts 145 */ 146 #define CONFIG_CMD_MTDPARTS 147 #define CONFIG_MTD_DEVICE 148 #define CONFIG_FLASH_CFI_MTD 149 #define CONFIG_MTD_PARTITIONS 150 #define MTDIDS_DEFAULT "nand0=mxc_nand,nor0=physmap-flash.0" 151 #define MTDPARTS_DEFAULT "mtdparts=mxc_nand:50m(root1)," \ 152 "32m(rootfb)," \ 153 "64m(pcache)," \ 154 "64m(app1)," \ 155 "10m(app2),-(spool);" \ 156 "physmap-flash.0:512k(u-boot),64k(env1)," \ 157 "64k(env2),3776k(kernel1),3776k(kernel2)" 158 159 /* 160 * FLASH and environment organization 161 */ 162 #define CONFIG_SYS_FLASH_BASE CS0_BASE_ADDR 163 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */ 164 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */ 165 /* Monitor at beginning of flash */ 166 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 167 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 168 169 #define CONFIG_ENV_SECT_SIZE (64 * 1024) 170 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE 171 172 /* Address and size of Redundant Environment Sector */ 173 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 174 #define CONFIG_ENV_SIZE_REDUND CONFIG_ENV_SIZE 175 176 #define CONFIG_ENV_ADDR (CONFIG_SYS_MONITOR_BASE + \ 177 CONFIG_SYS_MONITOR_LEN) 178 179 #define CONFIG_ENV_IS_IN_FLASH 180 181 /* 182 * CFI FLASH driver setup 183 */ 184 #define CONFIG_SYS_FLASH_CFI /* Flash memory is CFI compliant */ 185 #define CONFIG_FLASH_CFI_DRIVER 186 187 /* A non-standard buffered write algorithm */ 188 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* faster */ 189 #define CONFIG_SYS_FLASH_PROTECTION /* Use hardware sector protection */ 190 191 /* 192 * NAND FLASH driver setup 193 */ 194 #define CONFIG_NAND_MXC 195 #define CONFIG_MXC_NAND_REGS_BASE (NFC_BASE_ADDR) 196 #define CONFIG_SYS_MAX_NAND_DEVICE 1 197 #define CONFIG_SYS_NAND_BASE (NFC_BASE_ADDR) 198 #define CONFIG_MXC_NAND_HWECC 199 #define CONFIG_SYS_NAND_LARGEPAGE 200 201 /* 202 * Default environment and default scripts 203 * to update uboot and load kernel 204 */ 205 206 #define CONFIG_HOSTNAME flea3 207 #define CONFIG_EXTRA_ENV_SETTINGS \ 208 "netdev=eth0\0" \ 209 "nfsargs=setenv bootargs root=/dev/nfs rw " \ 210 "nfsroot=${serverip}:${rootpath}\0" \ 211 "ramargs=setenv bootargs root=/dev/ram rw\0" \ 212 "addip_sta=setenv bootargs ${bootargs} " \ 213 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}" \ 214 ":${hostname}:${netdev}:off panic=1\0" \ 215 "addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0" \ 216 "addip=if test -n ${ipdyn};then run addip_dyn;" \ 217 "else run addip_sta;fi\0" \ 218 "addmtd=setenv bootargs ${bootargs} ${mtdparts}\0" \ 219 "addtty=setenv bootargs ${bootargs}" \ 220 " console=ttymxc2,${baudrate}\0" \ 221 "addmisc=setenv bootargs ${bootargs} ${misc}\0" \ 222 "loadaddr=80800000\0" \ 223 "kernel_addr_r=80800000\0" \ 224 "hostname=" __stringify(CONFIG_HOSTNAME) "\0" \ 225 "bootfile=" __stringify(CONFIG_HOSTNAME) "/uImage\0" \ 226 "ramdisk_file=" __stringify(CONFIG_HOSTNAME) "/uRamdisk\0" \ 227 "flash_self=run ramargs addip addtty addmtd addmisc;" \ 228 "bootm ${kernel_addr} ${ramdisk_addr}\0" \ 229 "flash_nfs=run nfsargs addip addtty addmtd addmisc;" \ 230 "bootm ${kernel_addr}\0" \ 231 "net_nfs=tftp ${kernel_addr_r} ${bootfile}; " \ 232 "run nfsargs addip addtty addmtd addmisc;" \ 233 "bootm ${kernel_addr_r}\0" \ 234 "net_self_load=tftp ${kernel_addr_r} ${bootfile};" \ 235 "tftp ${ramdisk_addr_r} ${ramdisk_file};\0" \ 236 "net_self=if run net_self_load;then " \ 237 "run ramargs addip addtty addmtd addmisc;" \ 238 "bootm ${kernel_addr_r} ${ramdisk_addr_r};" \ 239 "else echo Images not loades;fi\0" \ 240 "u-boot=" __stringify(CONFIG_HOSTNAME) "/u-boot.bin\0" \ 241 "load=tftp ${loadaddr} ${u-boot}\0" \ 242 "uboot_addr=" __stringify(CONFIG_SYS_MONITOR_BASE) "\0" \ 243 "update=protect off ${uboot_addr} +40000;" \ 244 "erase ${uboot_addr} +40000;" \ 245 "cp.b ${loadaddr} ${uboot_addr} ${filesize}\0" \ 246 "upd=if run load;then echo Updating u-boot;if run update;" \ 247 "then echo U-Boot updated;" \ 248 "else echo Error updating u-boot !;" \ 249 "echo Board without bootloader !!;" \ 250 "fi;" \ 251 "else echo U-Boot not downloaded..exiting;fi\0" \ 252 "bootcmd=run net_nfs\0" 253 254 #endif /* __CONFIG_H */ 255