xref: /openbmc/u-boot/include/configs/ethernut5.h (revision 1a05b5f9)
1 /*
2  * (C) Copyright 2011
3  * egnite GmbH <info@egnite.de>
4  *
5  * Configuation settings for Ethernut 5 with AT91SAM9XE.
6  *
7  * SPDX-License-Identifier:	GPL-2.0+
8  */
9 
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12 
13 #include <asm/hardware.h>
14 
15 /* The first stage boot loader expects u-boot running at this address. */
16 #define CONFIG_SYS_TEXT_BASE	0x27000000	/* 16MB available */
17 
18 /* The first stage boot loader takes care of low level initialization. */
19 #define CONFIG_SKIP_LOWLEVEL_INIT
20 
21 /* Set our official architecture number. */
22 #define MACH_TYPE_ETHERNUT5 1971
23 #define CONFIG_MACH_TYPE MACH_TYPE_ETHERNUT5
24 
25 /* CPU information */
26 #define CONFIG_ARM926EJS
27 #define CONFIG_AT91FAMILY
28 #define CONFIG_DISPLAY_CPUINFO		/* Display at console. */
29 #define CONFIG_ARCH_CPU_INIT
30 
31 /* ARM asynchronous clock */
32 #define CONFIG_SYS_AT91_SLOW_CLOCK	32768	/* slow clock xtal */
33 #define CONFIG_SYS_AT91_MAIN_CLOCK	18432000 /* 18.432 MHz crystal */
34 #define CONFIG_SYS_HZ			1000
35 
36 /* 32kB internal SRAM */
37 #define CONFIG_SRAM_BASE	0x00300000 /*AT91SAM9XE_SRAM_BASE */
38 #define CONFIG_SRAM_SIZE	(32 << 10)
39 #define CONFIG_SYS_INIT_SP_ADDR	(CONFIG_SRAM_BASE + CONFIG_SRAM_SIZE - \
40 				GENERATED_GBL_DATA_SIZE)
41 
42 /* 128MB SDRAM in 1 bank */
43 #define CONFIG_NR_DRAM_BANKS		1
44 #define CONFIG_SYS_SDRAM_BASE		0x20000000
45 #define CONFIG_SYS_SDRAM_SIZE		(128 << 20)
46 #define CONFIG_SYS_LOAD_ADDR		CONFIG_SYS_SDRAM_BASE
47 #define CONFIG_LOADADDR			CONFIG_SYS_LOAD_ADDR
48 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (1 << 20))
49 #define CONFIG_SYS_MEMTEST_START	CONFIG_SYS_SDRAM_BASE
50 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_TEXT_BASE \
51 					- CONFIG_SYS_MALLOC_LEN)
52 
53 /* 512kB on-chip NOR flash */
54 # define CONFIG_SYS_MAX_FLASH_BANKS	1
55 # define CONFIG_SYS_FLASH_BASE		0x00200000 /* AT91SAM9XE_FLASH_BASE */
56 # define CONFIG_AT91_EFLASH
57 # define CONFIG_SYS_MAX_FLASH_SECT	32
58 # define CONFIG_SYS_FLASH_PROTECTION	/* First stage loader in sector 0 */
59 # define CONFIG_EFLASH_PROTSECTORS	1
60 
61 /* 512kB DataFlash at NPCS0 */
62 #define CONFIG_SYS_MAX_DATAFLASH_BANKS	1
63 #define CONFIG_HAS_DATAFLASH
64 #define CONFIG_SPI_FLASH
65 #define CONFIG_SPI_FLASH_ATMEL
66 #define CONFIG_ATMEL_DATAFLASH_SPI
67 #define CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0	0xC0000000
68 #define DATAFLASH_TCSS			(0x1a << 16)
69 #define DATAFLASH_TCHS			(0x1 << 24)
70 
71 #define CONFIG_ENV_IS_IN_SPI_FLASH
72 #define CONFIG_ENV_OFFSET		0x3DE000
73 #define CONFIG_ENV_SECT_SIZE		(132 << 10)
74 #define CONFIG_ENV_SIZE			CONFIG_ENV_SECT_SIZE
75 #define CONFIG_ENV_ADDR			(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 \
76 					+ CONFIG_ENV_OFFSET)
77 #define CONFIG_SYS_MONITOR_BASE		(CONFIG_SYS_DATAFLASH_LOGIC_ADDR_CS0 \
78 					+ 0x042000)
79 
80 /* SPI */
81 #define CONFIG_ATMEL_SPI
82 #define CONFIG_SYS_SPI_WRITE_TOUT	(5 * CONFIG_SYS_HZ)
83 #define AT91_SPI_CLK			15000000
84 
85 /* Serial port */
86 #define CONFIG_ATMEL_USART
87 #define CONFIG_USART3			/* USART 3 is DBGU */
88 #define CONFIG_BAUDRATE			115200
89 #define CONFIG_USART_BASE		ATMEL_BASE_DBGU
90 #define	CONFIG_USART_ID			ATMEL_ID_SYS
91 
92 /* Misc. hardware drivers */
93 #define CONFIG_AT91_GPIO
94 
95 /* Command line configuration */
96 #include <config_cmd_default.h>
97 #undef CONFIG_CMD_BDI
98 #undef CONFIG_CMD_FPGA
99 #undef CONFIG_CMD_LOADS
100 
101 #define CONFIG_CMD_JFFS2
102 #define CONFIG_CMD_MII
103 #define CONFIG_CMD_MTDPARTS
104 #define CONFIG_CMD_NAND
105 #define CONFIG_CMD_SPI
106 
107 #ifdef MINIMAL_LOADER
108 #undef CONFIG_CMD_CONSOLE
109 #undef CONFIG_CMD_EDITENV
110 #undef CONFIG_CMD_IMI
111 #undef CONFIG_CMD_ITEST
112 #undef CONFIG_CMD_IMLS
113 #undef CONFIG_CMD_LOADB
114 #undef CONFIG_CMD_LOADS
115 #undef CONFIG_CMD_NFS
116 #undef CONFIG_CMD_SETGETDCR
117 #undef CONFIG_CMD_XIMG
118 #else
119 #define CONFIG_CMD_ASKENV
120 #define CONFIG_CMD_BSP
121 #define CONFIG_CMD_CACHE
122 #define CONFIG_CMD_CDP
123 #define CONFIG_CMD_DATE
124 #define CONFIG_CMD_DHCP
125 #define CONFIG_CMD_DNS
126 #define CONFIG_CMD_EXT2
127 #define CONFIG_CMD_FAT
128 #define CONFIG_CMD_I2C
129 #define CONFIG_CMD_MMC
130 #define CONFIG_CMD_PING
131 #define CONFIG_CMD_RARP
132 #define CONFIG_CMD_REISER
133 #define CONFIG_CMD_SAVES
134 #define CONFIG_CMD_SETEXPR
135 #define CONFIG_CMD_SF
136 #define CONFIG_CMD_SNTP
137 #define CONFIG_CMD_UBI
138 #define CONFIG_CMD_UBIFS
139 #define CONFIG_CMD_UNZIP
140 #define CONFIG_CMD_USB
141 #endif
142 
143 /* NAND flash */
144 #ifdef CONFIG_CMD_NAND
145 #define CONFIG_SYS_MAX_NAND_DEVICE	1
146 #define CONFIG_SYS_NAND_BASE		0x40000000
147 #define CONFIG_SYS_NAND_DBW_8
148 #define CONFIG_NAND_ATMEL
149 /* our ALE is AD21 */
150 #define CONFIG_SYS_NAND_MASK_ALE	(1 << 21)
151 /* our CLE is AD22 */
152 #define CONFIG_SYS_NAND_MASK_CLE	(1 << 22)
153 #define CONFIG_SYS_NAND_ENABLE_PIN	AT91_PIO_PORTC, 14
154 #endif
155 
156 /* JFFS2 */
157 #ifdef CONFIG_CMD_JFFS2
158 #define CONFIG_MTD_NAND_ECC_JFFS2
159 #define CONFIG_JFFS2_CMDLINE
160 #define CONFIG_JFFS2_NAND
161 #endif
162 
163 /* Ethernet */
164 #define CONFIG_NET_RETRY_COUNT		20
165 #define CONFIG_MACB
166 #define CONFIG_RMII
167 #define CONFIG_PHY_ID			0
168 #define CONFIG_MACB_SEARCH_PHY
169 
170 /* MMC */
171 #ifdef CONFIG_CMD_MMC
172 #define CONFIG_MMC
173 #define CONFIG_GENERIC_MMC
174 #define CONFIG_GENERIC_ATMEL_MCI
175 #define CONFIG_SYS_MMC_CD_PIN		AT91_PIO_PORTC, 8
176 #endif
177 
178 /* USB */
179 #ifdef CONFIG_CMD_USB
180 #define CONFIG_USB_ATMEL
181 #define CONFIG_USB_OHCI_NEW
182 #define CONFIG_SYS_USB_OHCI_CPU_INIT
183 #define CONFIG_SYS_USB_OHCI_REGS_BASE	0x00500000
184 #define CONFIG_SYS_USB_OHCI_SLOT_NAME	"host"
185 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS	2
186 #define CONFIG_USB_STORAGE
187 #endif
188 
189 /* RTC */
190 #if defined(CONFIG_CMD_DATE) || defined(CONFIG_CMD_SNTP)
191 #define CONFIG_RTC_PCF8563
192 #define CONFIG_SYS_I2C_RTC_ADDR		0x51
193 #endif
194 
195 /* I2C */
196 #define CONFIG_SYS_MAX_I2C_BUS	1
197 
198 #define CONFIG_SYS_I2C
199 #define CONFIG_SYS_I2C_SOFT			/* I2C bit-banged */
200 #define CONFIG_SYS_I2C_SOFT_SPEED	100000
201 #define CONFIG_SYS_I2C_SOFT_SLAVE	0
202 
203 #define I2C_SOFT_DECLARATIONS
204 
205 #define GPIO_I2C_SCL		AT91_PIO_PORTA, 24
206 #define GPIO_I2C_SDA		AT91_PIO_PORTA, 23
207 
208 #define I2C_INIT { \
209 	at91_set_pio_periph(AT91_PIO_PORTA, 23, 0); \
210 	at91_set_pio_multi_drive(AT91_PIO_PORTA, 23, 1); \
211 	at91_set_pio_periph(AT91_PIO_PORTA, 24, 0); \
212 	at91_set_pio_output(AT91_PIO_PORTA, 24, 0); \
213 	at91_set_pio_multi_drive(AT91_PIO_PORTA, 24, 1); \
214 }
215 
216 #define I2C_ACTIVE	at91_set_pio_output(AT91_PIO_PORTA, 23, 0)
217 #define I2C_TRISTATE	at91_set_pio_input(AT91_PIO_PORTA, 23, 0)
218 #define I2C_SCL(bit)	at91_set_pio_value(AT91_PIO_PORTA, 24, bit)
219 #define I2C_SDA(bit)	at91_set_pio_value(AT91_PIO_PORTA, 23, bit)
220 #define I2C_DELAY	udelay(100)
221 #define I2C_READ	at91_get_pio_value(AT91_PIO_PORTA, 23)
222 
223 /* DHCP/BOOTP options */
224 #ifdef CONFIG_CMD_DHCP
225 #define CONFIG_BOOTP_BOOTFILESIZE
226 #define CONFIG_BOOTP_BOOTPATH
227 #define CONFIG_BOOTP_GATEWAY
228 #define CONFIG_BOOTP_HOSTNAME
229 #define CONFIG_SYS_AUTOLOAD	"n"
230 #endif
231 
232 /* File systems */
233 #define CONFIG_MTD_DEVICE
234 #define CONFIG_MTD_PARTITIONS
235 #if defined(CONFIG_CMD_MTDPARTS) || defined(CONFIG_CMD_NAND)
236 #define MTDIDS_DEFAULT		"nand0=atmel_nand"
237 #define MTDPARTS_DEFAULT	"mtdparts=atmel_nand:-(root)"
238 #endif
239 #if defined(CONFIG_CMD_REISER) || defined(CONFIG_CMD_EXT2) || \
240 	defined(CONFIG_CMD_USB) || defined(CONFIG_MMC)
241 #define CONFIG_DOS_PARTITION
242 #endif
243 #define CONFIG_LZO
244 #define CONFIG_RBTREE
245 
246 /* Boot command */
247 #define CONFIG_BOOTDELAY	3
248 #define CONFIG_CMDLINE_TAG
249 #define CONFIG_SETUP_MEMORY_TAGS
250 #define CONFIG_INITRD_TAG
251 #define CONFIG_BOOTCOMMAND	"cp.b 0xC00C6000 ${loadaddr} 0x294000; bootm"
252 #if defined(CONFIG_CMD_NAND)
253 #define CONFIG_BOOTARGS		"console=ttyS0,115200 " \
254 				"root=/dev/mtdblock0 " \
255 				MTDPARTS_DEFAULT \
256 				" rw rootfstype=jffs2"
257 #endif
258 
259 /* Misc. u-boot settings */
260 #define CONFIG_SYS_PROMPT		"U-Boot> "
261 #define CONFIG_SYS_HUSH_PARSER
262 #define CONFIG_SYS_CBSIZE		256
263 #define CONFIG_SYS_MAXARGS		16
264 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + 16 \
265 					+ sizeof(CONFIG_SYS_PROMPT))
266 #define CONFIG_SYS_LONGHELP
267 #define CONFIG_CMDLINE_EDITING
268 
269 #endif
270