1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2014 Eukréa Electromatique
4  * Author: Eric Bénard <eric@eukrea.com>
5  *
6  * Configuration settings for the Embest RIoTboard
7  *
8  * based on mx6*sabre*.h which are :
9  * Copyright (C) 2012 Freescale Semiconductor, Inc.
10  */
11 
12 #ifndef __RIOTBOARD_CONFIG_H
13 #define __RIOTBOARD_CONFIG_H
14 
15 #define CONFIG_MXC_UART_BASE		UART2_BASE
16 #define CONSOLE_DEV		"ttymxc1"
17 
18 #define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)
19 
20 #define CONFIG_IMX_THERMAL
21 
22 /* Size of malloc() pool */
23 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
24 
25 #define CONFIG_MXC_UART
26 
27 /* I2C Configs */
28 #define CONFIG_SYS_I2C
29 #define CONFIG_SYS_I2C_MXC
30 #define CONFIG_SYS_I2C_MXC_I2C1		/* enable I2C bus 1 */
31 #define CONFIG_SYS_I2C_MXC_I2C2		/* enable I2C bus 2 */
32 #define CONFIG_SYS_I2C_MXC_I2C3		/* enable I2C bus 3 */
33 #define CONFIG_SYS_I2C_SPEED		100000
34 
35 /* USB Configs */
36 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
37 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
38 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
39 #define CONFIG_MXC_USB_FLAGS	0
40 
41 /* MMC Configs */
42 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
43 
44 #define CONFIG_FEC_MXC
45 #define IMX_FEC_BASE			ENET_BASE_ADDR
46 #define CONFIG_FEC_XCV_TYPE		RGMII
47 #define CONFIG_ETHPRIME			"FEC"
48 #define CONFIG_FEC_MXC_PHYADDR		4
49 
50 #define CONFIG_PHY_ATHEROS
51 
52 #ifdef CONFIG_CMD_SF
53 #define CONFIG_SF_DEFAULT_BUS		0
54 #define CONFIG_SF_DEFAULT_CS		0
55 #define CONFIG_SF_DEFAULT_SPEED		20000000
56 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
57 #endif
58 
59 #define CONFIG_ARP_TIMEOUT     200UL
60 
61 #define CONFIG_SYS_MEMTEST_START       0x10000000
62 #define CONFIG_SYS_MEMTEST_END         0x10010000
63 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
64 
65 /* Physical Memory Map */
66 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
67 
68 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
69 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
70 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
71 
72 #define CONFIG_SYS_INIT_SP_OFFSET \
73 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
74 #define CONFIG_SYS_INIT_SP_ADDR \
75 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
76 
77 /* Environment organization */
78 #define CONFIG_ENV_SIZE			(8 * 1024)
79 
80 #if defined(CONFIG_ENV_IS_IN_MMC)
81 /* RiOTboard */
82 #define CONFIG_FDTFILE	"imx6dl-riotboard.dtb"
83 #define CONFIG_SYS_FSL_USDHC_NUM	3
84 #define CONFIG_SYS_MMC_ENV_DEV		2	/* SDHC4 */
85 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
86 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
87 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
88 /* MarSBoard */
89 #define CONFIG_FDTFILE	"imx6q-marsboard.dtb"
90 #define CONFIG_SYS_FSL_USDHC_NUM	2
91 #define CONFIG_ENV_OFFSET		(768 * 1024)
92 #define CONFIG_ENV_SECT_SIZE		(8 * 1024)
93 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
94 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
95 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
96 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
97 #endif
98 
99 /* Framebuffer */
100 #define CONFIG_VIDEO_IPUV3
101 #define CONFIG_VIDEO_BMP_RLE8
102 #define CONFIG_SPLASH_SCREEN
103 #define CONFIG_SPLASH_SCREEN_ALIGN
104 #define CONFIG_BMP_16BPP
105 #define CONFIG_VIDEO_LOGO
106 #define CONFIG_VIDEO_BMP_LOGO
107 #define CONFIG_IMX_HDMI
108 #define CONFIG_IMX_VIDEO_SKIP
109 
110 #include "mx6_common.h"
111 
112 #ifdef CONFIG_SPL
113 #include "imx6_spl.h"
114 /* RiOTboard */
115 #define CONFIG_SYS_SPL_ARGS_ADDR 0x13000000
116 #define CONFIG_SPL_FS_LOAD_KERNEL_NAME "uImage"
117 #define CONFIG_SPL_FS_LOAD_ARGS_NAME "imx6dl-riotboard.dtb"
118 
119 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR        0 /* offset 69KB */
120 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR  0 /* offset 69KB */
121 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0 /* offset 69KB */
122 
123 #endif
124 
125 /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
126  * 1M script, 1M pxe and the ramdisk at the end */
127 #define MEM_LAYOUT_ENV_SETTINGS \
128 	"bootm_size=0x10000000\0" \
129 	"kernel_addr_r=0x12000000\0" \
130 	"fdt_addr_r=0x13000000\0" \
131 	"scriptaddr=0x13100000\0" \
132 	"pxefile_addr_r=0x13200000\0" \
133 	"ramdisk_addr_r=0x13300000\0"
134 
135 #define BOOT_TARGET_DEVICES(func) \
136 	func(MMC, mmc, 0) \
137 	func(MMC, mmc, 1) \
138 	func(MMC, mmc, 2) \
139 	func(USB, usb, 0) \
140 	func(PXE, pxe, na) \
141 	func(DHCP, dhcp, na)
142 
143 #include <config_distro_bootcmd.h>
144 
145 #define CONSOLE_STDIN_SETTINGS \
146 	"stdin=serial\0"
147 
148 #define CONSOLE_STDOUT_SETTINGS \
149 	"stdout=serial\0" \
150 	"stderr=serial\0"
151 
152 #define CONSOLE_ENV_SETTINGS \
153 	CONSOLE_STDIN_SETTINGS \
154 	CONSOLE_STDOUT_SETTINGS
155 
156 #define CONFIG_EXTRA_ENV_SETTINGS \
157 	CONSOLE_ENV_SETTINGS \
158 	MEM_LAYOUT_ENV_SETTINGS \
159 	"fdtfile=" CONFIG_FDTFILE "\0" \
160 	"finduuid=part uuid mmc 0:1 uuid\0" \
161 	BOOTENV
162 
163 #endif                         /* __RIOTBOARD_CONFIG_H */
164