1 /* 2 * Copyright (C) 2014 Eukréa Electromatique 3 * Author: Eric Bénard <eric@eukrea.com> 4 * 5 * Configuration settings for the Embest RIoTboard 6 * 7 * based on mx6*sabre*.h which are : 8 * Copyright (C) 2012 Freescale Semiconductor, Inc. 9 * 10 * SPDX-License-Identifier: GPL-2.0+ 11 */ 12 13 #ifndef __RIOTBOARD_CONFIG_H 14 #define __RIOTBOARD_CONFIG_H 15 16 #define CONFIG_MXC_UART_BASE UART2_BASE 17 #define CONSOLE_DEV "ttymxc1" 18 #define CONFIG_MMCROOT "/dev/mmcblk1p2" 19 20 #define PHYS_SDRAM_SIZE (1u * 1024 * 1024 * 1024) 21 22 #define CONFIG_IMX_THERMAL 23 24 /* Size of malloc() pool */ 25 #define CONFIG_SYS_MALLOC_LEN (10 * SZ_1M) 26 27 #define CONFIG_BOARD_EARLY_INIT_F 28 29 #define CONFIG_MXC_UART 30 31 /* I2C Configs */ 32 #define CONFIG_SYS_I2C 33 #define CONFIG_SYS_I2C_MXC 34 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */ 35 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */ 36 #define CONFIG_SYS_I2C_MXC_I2C3 /* enable I2C bus 3 */ 37 #define CONFIG_SYS_I2C_SPEED 100000 38 39 /* USB Configs */ 40 #define CONFIG_USB_EHCI 41 #define CONFIG_USB_EHCI_MX6 42 #define CONFIG_USB_HOST_ETHER 43 #define CONFIG_USB_ETHER_ASIX 44 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 45 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* For OTG port */ 46 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) 47 #define CONFIG_MXC_USB_FLAGS 0 48 49 /* MMC Configs */ 50 #define CONFIG_SYS_FSL_ESDHC_ADDR 0 51 52 #define CONFIG_FEC_MXC 53 #define CONFIG_MII 54 #define IMX_FEC_BASE ENET_BASE_ADDR 55 #define CONFIG_FEC_XCV_TYPE RGMII 56 #define CONFIG_ETHPRIME "FEC" 57 #define CONFIG_FEC_MXC_PHYADDR 4 58 59 #define CONFIG_PHYLIB 60 #define CONFIG_PHY_ATHEROS 61 62 #ifdef CONFIG_CMD_SF 63 #define CONFIG_MXC_SPI 64 #define CONFIG_SF_DEFAULT_BUS 0 65 #define CONFIG_SF_DEFAULT_CS 0 66 #define CONFIG_SF_DEFAULT_SPEED 20000000 67 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 68 #endif 69 70 #define CONFIG_CMD_BMODE 71 72 #define CONFIG_ARP_TIMEOUT 200UL 73 74 /* Print Buffer Size */ 75 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16) 76 77 #define CONFIG_SYS_MEMTEST_START 0x10000000 78 #define CONFIG_SYS_MEMTEST_END 0x10010000 79 #define CONFIG_SYS_MEMTEST_SCRATCH 0x10800000 80 81 #define CONFIG_STACKSIZE (128 * 1024) 82 83 /* Physical Memory Map */ 84 #define CONFIG_NR_DRAM_BANKS 1 85 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR 86 87 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM 88 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR 89 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE 90 91 #define CONFIG_SYS_INIT_SP_OFFSET \ 92 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 93 #define CONFIG_SYS_INIT_SP_ADDR \ 94 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET) 95 96 /* Environment organization */ 97 #define CONFIG_ENV_SIZE (8 * 1024) 98 99 #if defined(CONFIG_ENV_IS_IN_MMC) 100 /* RiOTboard */ 101 #define CONFIG_FDTFILE "imx6dl-riotboard.dtb" 102 #define CONFIG_SYS_FSL_USDHC_NUM 3 103 #define CONFIG_SYS_MMC_ENV_DEV 2 /* SDHC4 */ 104 #define CONFIG_ENV_OFFSET (6 * 64 * 1024) 105 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */ 106 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) 107 /* MarSBoard */ 108 #define CONFIG_FDTFILE "imx6q-marsboard.dtb" 109 #define CONFIG_SYS_FSL_USDHC_NUM 2 110 #define CONFIG_ENV_OFFSET (768 * 1024) 111 #define CONFIG_ENV_SECT_SIZE (8 * 1024) 112 #define CONFIG_ENV_SPI_BUS CONFIG_SF_DEFAULT_BUS 113 #define CONFIG_ENV_SPI_CS CONFIG_SF_DEFAULT_CS 114 #define CONFIG_ENV_SPI_MODE CONFIG_SF_DEFAULT_MODE 115 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 116 #endif 117 118 /* Framebuffer */ 119 #define CONFIG_VIDEO_IPUV3 120 #define CONFIG_VIDEO_BMP_RLE8 121 #define CONFIG_SPLASH_SCREEN 122 #define CONFIG_SPLASH_SCREEN_ALIGN 123 #define CONFIG_BMP_16BPP 124 #define CONFIG_VIDEO_LOGO 125 #define CONFIG_VIDEO_BMP_LOGO 126 #define CONFIG_IPUV3_CLK 260000000 127 #define CONFIG_IMX_HDMI 128 #define CONFIG_IMX_VIDEO_SKIP 129 130 #include <config_distro_defaults.h> 131 #include "mx6_common.h" 132 133 /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt, 134 * 1M script, 1M pxe and the ramdisk at the end */ 135 #define MEM_LAYOUT_ENV_SETTINGS \ 136 "bootm_size=0x10000000\0" \ 137 "kernel_addr_r=0x12000000\0" \ 138 "fdt_addr_r=0x13000000\0" \ 139 "scriptaddr=0x13100000\0" \ 140 "pxefile_addr_r=0x13200000\0" \ 141 "ramdisk_addr_r=0x13300000\0" 142 143 #define BOOT_TARGET_DEVICES(func) \ 144 func(MMC, mmc, 0) \ 145 func(MMC, mmc, 1) \ 146 func(MMC, mmc, 2) \ 147 func(USB, usb, 0) \ 148 func(PXE, pxe, na) \ 149 func(DHCP, dhcp, na) 150 151 #include <config_distro_bootcmd.h> 152 153 #define CONSOLE_STDIN_SETTINGS \ 154 "stdin=serial\0" 155 156 #define CONSOLE_STDOUT_SETTINGS \ 157 "stdout=serial\0" \ 158 "stderr=serial\0" 159 160 #define CONSOLE_ENV_SETTINGS \ 161 CONSOLE_STDIN_SETTINGS \ 162 CONSOLE_STDOUT_SETTINGS 163 164 #define CONFIG_EXTRA_ENV_SETTINGS \ 165 CONSOLE_ENV_SETTINGS \ 166 MEM_LAYOUT_ENV_SETTINGS \ 167 "fdtfile=" CONFIG_FDTFILE "\0" \ 168 BOOTENV 169 170 #endif /* __RIOTBOARD_CONFIG_H */ 171