1 /*
2  * Copyright (C) 2014 Eukréa Electromatique
3  * Author: Eric Bénard <eric@eukrea.com>
4  *
5  * Configuration settings for the Embest RIoTboard
6  *
7  * based on mx6*sabre*.h which are :
8  * Copyright (C) 2012 Freescale Semiconductor, Inc.
9  *
10  * SPDX-License-Identifier:	GPL-2.0+
11  */
12 
13 #ifndef __RIOTBOARD_CONFIG_H
14 #define __RIOTBOARD_CONFIG_H
15 
16 #include <asm/arch/imx-regs.h>
17 #include <asm/imx-common/gpio.h>
18 
19 #include "mx6_common.h"
20 #include <linux/sizes.h>
21 
22 #define CONFIG_SYS_GENERIC_BOARD
23 
24 #define CONFIG_MXC_UART_BASE		UART2_BASE
25 #define CONFIG_CONSOLE_DEV		"ttymxc1"
26 #define CONFIG_MMCROOT			"/dev/mmcblk1p2"
27 
28 #define PHYS_SDRAM_SIZE		(1u * 1024 * 1024 * 1024)
29 
30 #define CONFIG_MX6
31 
32 #define CONFIG_DISPLAY_CPUINFO
33 #define CONFIG_DISPLAY_BOARDINFO
34 
35 #define CONFIG_CMDLINE_TAG
36 #define CONFIG_SETUP_MEMORY_TAGS
37 #define CONFIG_INITRD_TAG
38 #define CONFIG_REVISION_TAG
39 
40 /* Size of malloc() pool */
41 #define CONFIG_SYS_MALLOC_LEN		(10 * SZ_1M)
42 
43 #define CONFIG_BOARD_EARLY_INIT_F
44 #define CONFIG_BOARD_LATE_INIT
45 #define CONFIG_MXC_GPIO
46 
47 #define CONFIG_MXC_UART
48 
49 #define CONFIG_CMD_FUSE
50 #ifdef CONFIG_CMD_FUSE
51 #define CONFIG_MXC_OCOTP
52 #endif
53 
54 /* I2C Configs */
55 #define CONFIG_CMD_I2C
56 #define CONFIG_SYS_I2C
57 #define CONFIG_SYS_I2C_MXC
58 #define CONFIG_SYS_I2C_SPEED		100000
59 
60 /* USB Configs */
61 #define CONFIG_CMD_USB
62 #define CONFIG_USB_EHCI
63 #define CONFIG_USB_EHCI_MX6
64 #define CONFIG_USB_STORAGE
65 #define CONFIG_USB_HOST_ETHER
66 #define CONFIG_USB_ETHER_ASIX
67 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
68 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET	/* For OTG port */
69 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
70 #define CONFIG_MXC_USB_FLAGS	0
71 
72 /* MMC Configs */
73 #define CONFIG_FSL_ESDHC
74 #define CONFIG_FSL_USDHC
75 #define CONFIG_SYS_FSL_ESDHC_ADDR      0
76 
77 #define CONFIG_MMC
78 #define CONFIG_CMD_MMC
79 #define CONFIG_GENERIC_MMC
80 #define CONFIG_BOUNCE_BUFFER
81 
82 #define CONFIG_FEC_MXC
83 #define CONFIG_MII
84 #define IMX_FEC_BASE			ENET_BASE_ADDR
85 #define CONFIG_FEC_XCV_TYPE		RGMII
86 #define CONFIG_ETHPRIME			"FEC"
87 #define CONFIG_FEC_MXC_PHYADDR		4
88 
89 #define CONFIG_PHYLIB
90 #define CONFIG_PHY_ATHEROS
91 
92 #define CONFIG_CMD_SF
93 #ifdef CONFIG_CMD_SF
94 #define CONFIG_SPI_FLASH
95 #define CONFIG_SPI_FLASH_SST
96 #define CONFIG_MXC_SPI
97 #define CONFIG_SF_DEFAULT_BUS		0
98 #define CONFIG_SF_DEFAULT_CS		0
99 #define CONFIG_SF_DEFAULT_SPEED		20000000
100 #define CONFIG_SF_DEFAULT_MODE		SPI_MODE_0
101 #endif
102 
103 /* allow to overwrite serial and ethaddr */
104 #define CONFIG_ENV_OVERWRITE
105 #define CONFIG_CONS_INDEX              1
106 #define CONFIG_BAUDRATE                        115200
107 
108 /* Command definition */
109 #include <config_cmd_default.h>
110 #undef CONFIG_CMD_FPGA
111 
112 #define CONFIG_CMD_BMODE
113 #define CONFIG_CMD_SETEXPR
114 #undef CONFIG_CMD_IMLS
115 
116 #define CONFIG_LOADADDR                        0x12000000
117 #define CONFIG_SYS_TEXT_BASE           0x17800000
118 
119 #define CONFIG_ARP_TIMEOUT     200UL
120 
121 /* Miscellaneous configurable options */
122 #define CONFIG_SYS_PROMPT_HUSH_PS2     "> "
123 #define CONFIG_SYS_CBSIZE              256
124 
125 /* Print Buffer Size */
126 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
127 #define CONFIG_SYS_MAXARGS             16
128 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
129 
130 #define CONFIG_SYS_MEMTEST_START       0x10000000
131 #define CONFIG_SYS_MEMTEST_END         0x10010000
132 #define CONFIG_SYS_MEMTEST_SCRATCH     0x10800000
133 
134 #define CONFIG_SYS_LOAD_ADDR           CONFIG_LOADADDR
135 
136 #define CONFIG_STACKSIZE               (128 * 1024)
137 
138 /* Physical Memory Map */
139 #define CONFIG_NR_DRAM_BANKS           1
140 #define PHYS_SDRAM                     MMDC0_ARB_BASE_ADDR
141 
142 #define CONFIG_SYS_SDRAM_BASE          PHYS_SDRAM
143 #define CONFIG_SYS_INIT_RAM_ADDR       IRAM_BASE_ADDR
144 #define CONFIG_SYS_INIT_RAM_SIZE       IRAM_SIZE
145 
146 #define CONFIG_SYS_INIT_SP_OFFSET \
147 	(CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
148 #define CONFIG_SYS_INIT_SP_ADDR \
149 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
150 
151 /* FLASH and environment organization */
152 #define CONFIG_SYS_NO_FLASH
153 
154 #define CONFIG_ENV_SIZE			(8 * 1024)
155 
156 #if defined(CONFIG_ENV_IS_IN_MMC)
157 /* RiOTboard */
158 #define CONFIG_FDTFILE	"imx6dl-riotboard.dtb"
159 #define CONFIG_SYS_FSL_USDHC_NUM	3
160 #define CONFIG_SYS_MMC_ENV_DEV		2	/* SDHC4 */
161 #define CONFIG_ENV_OFFSET		(6 * 64 * 1024)
162 #define CONFIG_SUPPORT_EMMC_BOOT /* eMMC specific */
163 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH)
164 /* MarSBoard */
165 #define CONFIG_FDTFILE	"imx6q-marsboard.dtb"
166 #define CONFIG_SYS_FSL_USDHC_NUM	2
167 #define CONFIG_ENV_OFFSET		(768 * 1024)
168 #define CONFIG_ENV_SECT_SIZE		(8 * 1024)
169 #define CONFIG_ENV_SPI_BUS		CONFIG_SF_DEFAULT_BUS
170 #define CONFIG_ENV_SPI_CS		CONFIG_SF_DEFAULT_CS
171 #define CONFIG_ENV_SPI_MODE		CONFIG_SF_DEFAULT_MODE
172 #define CONFIG_ENV_SPI_MAX_HZ		CONFIG_SF_DEFAULT_SPEED
173 #endif
174 
175 #ifndef CONFIG_SYS_DCACHE_OFF
176 #define CONFIG_CMD_CACHE
177 #endif
178 
179 /* Framebuffer */
180 #define CONFIG_VIDEO
181 #define CONFIG_VIDEO_IPUV3
182 #define CONFIG_CFB_CONSOLE
183 #define CONFIG_VGA_AS_SINGLE_DEVICE
184 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
185 #define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
186 #define CONFIG_VIDEO_BMP_RLE8
187 #define CONFIG_SPLASH_SCREEN
188 #define CONFIG_SPLASH_SCREEN_ALIGN
189 #define CONFIG_BMP_16BPP
190 #define CONFIG_VIDEO_LOGO
191 #define CONFIG_VIDEO_BMP_LOGO
192 #define CONFIG_IPUV3_CLK 260000000
193 #define CONFIG_IMX_HDMI
194 #define CONFIG_IMX_VIDEO_SKIP
195 
196 #include <config_distro_defaults.h>
197 
198 /* 256M RAM (minimum), 32M uncompressed kernel, 16M compressed kernel, 1M fdt,
199  * 1M script, 1M pxe and the ramdisk at the end */
200 #define MEM_LAYOUT_ENV_SETTINGS \
201 	"bootm_size=0x10000000\0" \
202 	"kernel_addr_r=0x12000000\0" \
203 	"fdt_addr_r=0x13000000\0" \
204 	"scriptaddr=0x13100000\0" \
205 	"pxefile_addr_r=0x13200000\0" \
206 	"ramdisk_addr_r=0x13300000\0"
207 
208 #define BOOT_TARGET_DEVICES(func) \
209 	func(MMC, mmc, 0) \
210 	func(MMC, mmc, 1) \
211 	func(MMC, mmc, 2) \
212 	func(USB, usb, 0) \
213 	func(PXE, pxe, na) \
214 	func(DHCP, dhcp, na)
215 
216 #include <config_distro_bootcmd.h>
217 
218 #define CONSOLE_STDIN_SETTINGS \
219 	"stdin=serial\0"
220 
221 #define CONSOLE_STDOUT_SETTINGS \
222 	"stdout=serial\0" \
223 	"stderr=serial\0"
224 
225 #define CONSOLE_ENV_SETTINGS \
226 	CONSOLE_STDIN_SETTINGS \
227 	CONSOLE_STDOUT_SETTINGS
228 
229 #define CONFIG_EXTRA_ENV_SETTINGS \
230 	CONSOLE_ENV_SETTINGS \
231 	MEM_LAYOUT_ENV_SETTINGS \
232 	"fdtfile=" CONFIG_FDTFILE "\0" \
233 	BOOTENV
234 
235 #endif                         /* __RIOTBOARD_CONFIG_H */
236