1 /* 2 * Configuation settings for the Renesas Solutions ECOVEC board 3 * 4 * Copyright (C) 2009 - 2011 Renesas Solutions Corp. 5 * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com> 6 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 7 * 8 * See file CREDITS for list of people who contributed to this 9 * project. 10 * 11 * This program is free software; you can redistribute it and/or 12 * modify it under the terms of the GNU General Public License as 13 * published by the Free Software Foundation; either version 2 of 14 * the License, or (at your option) any later version. 15 * 16 * This program is distributed in the hope that it will be useful, 17 * but WITHOUT ANY WARRANTY; without even the implied warranty of 18 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19 * GNU General Public License for more details. 20 * 21 * You should have received a copy of the GNU General Public License 22 * along with this program; if not, write to the Free Software 23 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 24 * MA 02111-1307 USA 25 */ 26 27 #ifndef __ECOVEC_H 28 #define __ECOVEC_H 29 30 /* 31 * Address Interface BusWidth 32 *----------------------------------------- 33 * 0x0000_0000 U-Boot 16bit 34 * 0x0004_0000 Linux romImage 16bit 35 * 0x0014_0000 MTD for Linux 16bit 36 * 0x0400_0000 Internal I/O 16/32bit 37 * 0x0800_0000 DRAM 32bit 38 * 0x1800_0000 MFI 16bit 39 */ 40 41 #undef DEBUG 42 #define CONFIG_SH 1 43 #define CONFIG_SH4 1 44 #define CONFIG_SH4A 1 45 #define CONFIG_CPU_SH7724 1 46 #define CONFIG_BOARD_LATE_INIT 1 47 #define CONFIG_ECOVEC 1 48 49 #define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000 50 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 51 52 #define CONFIG_CMD_FLASH 53 #define CONFIG_CMD_MEMORY 54 #define CONFIG_CMD_NET 55 #define CONFIG_CMD_PING 56 #define CONFIG_CMD_MII 57 #define CONFIG_CMD_NFS 58 #define CONFIG_CMD_SDRAM 59 #define CONFIG_CMD_ENV 60 #define CONFIG_CMD_USB 61 #define CONFIG_CMD_FAT 62 #define CONFIG_CMD_EXT2 63 #define CONFIG_CMD_SAVEENV 64 65 #define CONFIG_USB_STORAGE 66 #define CONFIG_DOS_PARTITION 67 68 #define CONFIG_BAUDRATE 115200 69 #define CONFIG_BOOTDELAY 3 70 #define CONFIG_BOOTARGS "console=ttySC0,115200" 71 72 #define CONFIG_VERSION_VARIABLE 73 #undef CONFIG_SHOW_BOOT_PROGRESS 74 75 /* I2C */ 76 #define CONFIG_CMD_I2C 77 #define CONFIG_SH_I2C 1 78 #define CONFIG_HARD_I2C 1 79 #define CONFIG_I2C_MULTI_BUS 1 80 #define CONFIG_SYS_MAX_I2C_BUS 2 81 #define CONFIG_SYS_I2C_MODULE 1 82 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ 83 #define CONFIG_SYS_I2C_SLAVE 0x7F 84 #define CONFIG_SH_I2C_DATA_HIGH 4 85 #define CONFIG_SH_I2C_DATA_LOW 5 86 #define CONFIG_SH_I2C_CLOCK 41666666 87 #define CONFIG_SH_I2C_BASE0 0xA4470000 88 #define CONFIG_SH_I2C_BASE1 0xA4750000 89 90 /* Ether */ 91 #define CONFIG_SH_ETHER 1 92 #define CONFIG_SH_ETHER_USE_PORT (0) 93 #define CONFIG_SH_ETHER_PHY_ADDR (0x1f) 94 #define CONFIG_PHY_SMSC 1 95 #define CONFIG_PHYLIB 96 #define CONFIG_BITBANGMII 97 #define CONFIG_BITBANGMII_MULTI 98 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 99 100 /* USB / R8A66597 */ 101 #define CONFIG_USB_R8A66597_HCD 102 #define CONFIG_R8A66597_BASE_ADDR 0xA4D80000 103 #define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */ 104 #define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */ 105 #define CONFIG_R8A66597_ENDIAN 0x0000 /* little */ 106 #define CONFIG_SUPERH_ON_CHIP_R8A66597 107 108 /* undef to save memory */ 109 #define CONFIG_SYS_LONGHELP 110 /* Monitor Command Prompt */ 111 #define CONFIG_SYS_PROMPT "=> " 112 /* Buffer size for input from the Console */ 113 #define CONFIG_SYS_CBSIZE 256 114 /* Buffer size for Console output */ 115 #define CONFIG_SYS_PBSIZE 256 116 /* max args accepted for monitor commands */ 117 #define CONFIG_SYS_MAXARGS 16 118 /* Buffer size for Boot Arguments passed to kernel */ 119 #define CONFIG_SYS_BARGSIZE 512 120 /* List of legal baudrate settings for this board */ 121 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 122 123 /* SCIF */ 124 #define CONFIG_SCIF_CONSOLE 1 125 #define CONFIG_SCIF 1 126 #define CONFIG_CONS_SCIF0 1 127 128 /* Suppress display of console information at boot */ 129 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 130 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 131 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 132 133 /* SDRAM */ 134 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 135 #define CONFIG_SYS_SDRAM_SIZE (256 * 1024 * 1024) 136 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 137 138 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 139 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024) 140 /* Enable alternate, more extensive, memory test */ 141 #undef CONFIG_SYS_ALT_MEMTEST 142 /* Scratch address used by the alternate memory test */ 143 #undef CONFIG_SYS_MEMTEST_SCRATCH 144 145 /* Enable temporary baudrate change while serial download */ 146 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 147 148 /* FLASH */ 149 #define CONFIG_FLASH_CFI_DRIVER 1 150 #define CONFIG_SYS_FLASH_CFI 151 #undef CONFIG_SYS_FLASH_QUIET_TEST 152 #define CONFIG_SYS_FLASH_EMPTY_INFO 153 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 154 #define CONFIG_SYS_MAX_FLASH_SECT 512 155 156 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 157 #define CONFIG_SYS_MAX_FLASH_BANKS 1 158 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 159 160 /* Timeout for Flash erase operations (in ms) */ 161 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 162 /* Timeout for Flash write operations (in ms) */ 163 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 164 /* Timeout for Flash set sector lock bit operations (in ms) */ 165 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 166 /* Timeout for Flash clear lock bit operations (in ms) */ 167 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 168 169 /* 170 * Use hardware flash sectors protection instead 171 * of U-Boot software protection 172 */ 173 #undef CONFIG_SYS_FLASH_PROTECTION 174 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 175 176 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 177 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 178 /* Monitor size */ 179 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 180 /* Size of DRAM reserved for malloc() use */ 181 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 182 /* size in bytes reserved for initial data */ 183 #define CONFIG_SYS_GBL_DATA_SIZE (256) 184 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 185 186 /* ENV setting */ 187 #define CONFIG_ENV_IS_IN_FLASH 188 #define CONFIG_ENV_OVERWRITE 1 189 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 190 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 191 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 192 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 193 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 194 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 195 196 /* Board Clock */ 197 #define CONFIG_SYS_CLK_FREQ 41666666 198 #define CONFIG_SYS_TMU_CLK_DIV 4 199 #define CONFIG_SYS_HZ 1000 200 201 #endif /* __ECOVEC_H */ 202