xref: /openbmc/u-boot/include/configs/ecovec.h (revision 901b77b9)
1 /*
2  * Configuation settings for the Renesas Solutions ECOVEC board
3  *
4  * Copyright (C) 2009 - 2011 Renesas Solutions Corp.
5  * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com>
6  * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
7  *
8  * SPDX-License-Identifier:	GPL-2.0+
9  */
10 
11 #ifndef __ECOVEC_H
12 #define __ECOVEC_H
13 
14 /*
15  *  Address      Interface        BusWidth
16  *-----------------------------------------
17  *  0x0000_0000  U-Boot           16bit
18  *  0x0004_0000  Linux romImage   16bit
19  *  0x0014_0000  MTD for Linux    16bit
20  *  0x0400_0000  Internal I/O     16/32bit
21  *  0x0800_0000  DRAM             32bit
22  *  0x1800_0000  MFI              16bit
23  */
24 
25 #define CONFIG_CPU_SH7724	1
26 
27 #define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000
28 
29 #define CONFIG_DISPLAY_BOARDINFO
30 #undef  CONFIG_SHOW_BOOT_PROGRESS
31 
32 /* I2C */
33 #define CONFIG_SYS_I2C
34 #define CONFIG_SYS_I2C_SH
35 #define CONFIG_SYS_I2C_SLAVE	0x7F
36 #define CONFIG_SYS_I2C_SH_NUM_CONTROLLERS 2
37 #define CONFIG_SYS_I2C_SH_BASE0	0xA4470000
38 #define CONFIG_SYS_I2C_SH_SPEED0	100000
39 #define CONFIG_SYS_I2C_SH_BASE1	0xA4750000
40 #define CONFIG_SYS_I2C_SH_SPEED1	100000
41 #define CONFIG_SH_I2C_DATA_HIGH	4
42 #define CONFIG_SH_I2C_DATA_LOW 	5
43 #define CONFIG_SH_I2C_CLOCK  	41666666
44 
45 /* Ether */
46 #define CONFIG_SH_ETHER_USE_PORT (0)
47 #define CONFIG_SH_ETHER_PHY_ADDR (0x1f)
48 #define CONFIG_PHY_SMSC 1
49 #define CONFIG_BITBANGMII
50 #define CONFIG_BITBANGMII_MULTI
51 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII
52 
53 /* USB / R8A66597 */
54 #define CONFIG_USB_R8A66597_HCD
55 #define CONFIG_R8A66597_BASE_ADDR   0xA4D80000
56 #define CONFIG_R8A66597_XTAL        0x0000  /* 12MHz */
57 #define CONFIG_R8A66597_LDRV        0x8000  /* 3.3V */
58 #define CONFIG_R8A66597_ENDIAN      0x0000  /* little */
59 #define CONFIG_SUPERH_ON_CHIP_R8A66597
60 
61 /* undef to save memory	*/
62 /* Monitor Command Prompt */
63 /* Buffer size for Console output */
64 #define CONFIG_SYS_PBSIZE		256
65 /* List of legal baudrate settings for this board */
66 #define CONFIG_SYS_BAUDRATE_TABLE	{ 115200 }
67 
68 /* SCIF */
69 #define CONFIG_SCIF		1
70 #define CONFIG_CONS_SCIF0	1
71 
72 /* Suppress display of console information at boot */
73 
74 /* SDRAM */
75 #define CONFIG_SYS_SDRAM_BASE	(0x88000000)
76 #define CONFIG_SYS_SDRAM_SIZE	(256 * 1024 * 1024)
77 #define CONFIG_SYS_LOAD_ADDR	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024)
78 
79 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE)
80 #define CONFIG_SYS_MEMTEST_END	 (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024)
81 /* Enable alternate, more extensive, memory test */
82 /* Scratch address used by the alternate memory test */
83 #undef  CONFIG_SYS_MEMTEST_SCRATCH
84 
85 /* Enable temporary baudrate change while serial download */
86 #undef  CONFIG_SYS_LOADS_BAUD_CHANGE
87 
88 /* FLASH */
89 #define CONFIG_FLASH_CFI_DRIVER 1
90 #define CONFIG_SYS_FLASH_CFI
91 #undef  CONFIG_SYS_FLASH_QUIET_TEST
92 #define CONFIG_SYS_FLASH_EMPTY_INFO
93 #define CONFIG_SYS_FLASH_BASE	(0xA0000000)
94 #define CONFIG_SYS_MAX_FLASH_SECT	512
95 
96 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */
97 #define CONFIG_SYS_MAX_FLASH_BANKS	1
98 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
99 
100 /* Timeout for Flash erase operations (in ms) */
101 #define CONFIG_SYS_FLASH_ERASE_TOUT	(3 * 1000)
102 /* Timeout for Flash write operations (in ms) */
103 #define CONFIG_SYS_FLASH_WRITE_TOUT	(3 * 1000)
104 /* Timeout for Flash set sector lock bit operations (in ms) */
105 #define CONFIG_SYS_FLASH_LOCK_TOUT	(3 * 1000)
106 /* Timeout for Flash clear lock bit operations (in ms) */
107 #define CONFIG_SYS_FLASH_UNLOCK_TOUT	(3 * 1000)
108 
109 /*
110  * Use hardware flash sectors protection instead
111  * of U-Boot software protection
112  */
113 #undef  CONFIG_SYS_FLASH_PROTECTION
114 #undef  CONFIG_SYS_DIRECT_FLASH_TFTP
115 
116 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */
117 #define CONFIG_SYS_MONITOR_BASE	(CONFIG_SYS_FLASH_BASE)
118 /* Monitor size */
119 #define CONFIG_SYS_MONITOR_LEN	(256 * 1024)
120 /* Size of DRAM reserved for malloc() use */
121 #define CONFIG_SYS_MALLOC_LEN	(256 * 1024)
122 #define CONFIG_SYS_BOOTMAPSZ	(8 * 1024 * 1024)
123 
124 /* ENV setting */
125 #define CONFIG_ENV_OVERWRITE	1
126 #define CONFIG_ENV_SECT_SIZE	(128 * 1024)
127 #define CONFIG_ENV_SIZE		(CONFIG_ENV_SECT_SIZE)
128 #define CONFIG_ENV_ADDR		(CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
129 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */
130 #define CONFIG_ENV_OFFSET	(CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE)
131 #define CONFIG_ENV_SIZE_REDUND	(CONFIG_ENV_SECT_SIZE)
132 
133 /* Board Clock */
134 #define CONFIG_SYS_CLK_FREQ 41666666
135 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ
136 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
137 #define CONFIG_SYS_TMU_CLK_DIV      4
138 
139 #endif	/* __ECOVEC_H */
140