1 /* 2 * Configuation settings for the Renesas Solutions ECOVEC board 3 * 4 * Copyright (C) 2009 - 2011 Renesas Solutions Corp. 5 * Copyright (C) 2009 Kuninori Morimoto <morimoto.kuninori@renesas.com> 6 * Copyright (C) 2010, 2011 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com> 7 * 8 * SPDX-License-Identifier: GPL-2.0+ 9 */ 10 11 #ifndef __ECOVEC_H 12 #define __ECOVEC_H 13 14 /* 15 * Address Interface BusWidth 16 *----------------------------------------- 17 * 0x0000_0000 U-Boot 16bit 18 * 0x0004_0000 Linux romImage 16bit 19 * 0x0014_0000 MTD for Linux 16bit 20 * 0x0400_0000 Internal I/O 16/32bit 21 * 0x0800_0000 DRAM 32bit 22 * 0x1800_0000 MFI 16bit 23 */ 24 25 #undef DEBUG 26 #define CONFIG_SH 1 27 #define CONFIG_SH4 1 28 #define CONFIG_SH4A 1 29 #define CONFIG_CPU_SH7724 1 30 #define CONFIG_BOARD_LATE_INIT 1 31 #define CONFIG_ECOVEC 1 32 33 #define CONFIG_ECOVEC_ROMIMAGE_ADDR 0xA0040000 34 #define CONFIG_SYS_TEXT_BASE 0x8FFC0000 35 36 #define CONFIG_CMD_FLASH 37 #define CONFIG_CMD_MEMORY 38 #define CONFIG_CMD_NET 39 #define CONFIG_CMD_PING 40 #define CONFIG_CMD_MII 41 #define CONFIG_CMD_NFS 42 #define CONFIG_CMD_SDRAM 43 #define CONFIG_CMD_ENV 44 #define CONFIG_CMD_USB 45 #define CONFIG_CMD_FAT 46 #define CONFIG_CMD_EXT2 47 #define CONFIG_CMD_SAVEENV 48 49 #define CONFIG_USB_STORAGE 50 #define CONFIG_DOS_PARTITION 51 52 #define CONFIG_BAUDRATE 115200 53 #define CONFIG_BOOTDELAY 3 54 #define CONFIG_BOOTARGS "console=ttySC0,115200" 55 56 #define CONFIG_VERSION_VARIABLE 57 #undef CONFIG_SHOW_BOOT_PROGRESS 58 59 /* I2C */ 60 #define CONFIG_CMD_I2C 61 #define CONFIG_SH_I2C 1 62 #define CONFIG_HARD_I2C 1 63 #define CONFIG_I2C_MULTI_BUS 1 64 #define CONFIG_SYS_MAX_I2C_BUS 2 65 #define CONFIG_SYS_I2C_MODULE 1 66 #define CONFIG_SYS_I2C_SPEED 100000 /* 100 kHz */ 67 #define CONFIG_SYS_I2C_SLAVE 0x7F 68 #define CONFIG_SH_I2C_DATA_HIGH 4 69 #define CONFIG_SH_I2C_DATA_LOW 5 70 #define CONFIG_SH_I2C_CLOCK 41666666 71 #define CONFIG_SH_I2C_BASE0 0xA4470000 72 #define CONFIG_SH_I2C_BASE1 0xA4750000 73 74 /* Ether */ 75 #define CONFIG_SH_ETHER 1 76 #define CONFIG_SH_ETHER_USE_PORT (0) 77 #define CONFIG_SH_ETHER_PHY_ADDR (0x1f) 78 #define CONFIG_PHY_SMSC 1 79 #define CONFIG_PHYLIB 80 #define CONFIG_BITBANGMII 81 #define CONFIG_BITBANGMII_MULTI 82 #define CONFIG_SH_ETHER_PHY_MODE PHY_INTERFACE_MODE_MII 83 84 /* USB / R8A66597 */ 85 #define CONFIG_USB_R8A66597_HCD 86 #define CONFIG_R8A66597_BASE_ADDR 0xA4D80000 87 #define CONFIG_R8A66597_XTAL 0x0000 /* 12MHz */ 88 #define CONFIG_R8A66597_LDRV 0x8000 /* 3.3V */ 89 #define CONFIG_R8A66597_ENDIAN 0x0000 /* little */ 90 #define CONFIG_SUPERH_ON_CHIP_R8A66597 91 92 /* undef to save memory */ 93 #define CONFIG_SYS_LONGHELP 94 /* Monitor Command Prompt */ 95 /* Buffer size for input from the Console */ 96 #define CONFIG_SYS_CBSIZE 256 97 /* Buffer size for Console output */ 98 #define CONFIG_SYS_PBSIZE 256 99 /* max args accepted for monitor commands */ 100 #define CONFIG_SYS_MAXARGS 16 101 /* Buffer size for Boot Arguments passed to kernel */ 102 #define CONFIG_SYS_BARGSIZE 512 103 /* List of legal baudrate settings for this board */ 104 #define CONFIG_SYS_BAUDRATE_TABLE { 115200 } 105 106 /* SCIF */ 107 #define CONFIG_SCIF_CONSOLE 1 108 #define CONFIG_SCIF 1 109 #define CONFIG_CONS_SCIF0 1 110 111 /* Suppress display of console information at boot */ 112 #undef CONFIG_SYS_CONSOLE_INFO_QUIET 113 #undef CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE 114 #undef CONFIG_SYS_CONSOLE_ENV_OVERWRITE 115 116 /* SDRAM */ 117 #define CONFIG_SYS_SDRAM_BASE (0x88000000) 118 #define CONFIG_SYS_SDRAM_SIZE (256 * 1024 * 1024) 119 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 16 * 1024 * 1024) 120 121 #define CONFIG_SYS_MEMTEST_START (CONFIG_SYS_SDRAM_BASE) 122 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 200 * 1024 * 1024) 123 /* Enable alternate, more extensive, memory test */ 124 #undef CONFIG_SYS_ALT_MEMTEST 125 /* Scratch address used by the alternate memory test */ 126 #undef CONFIG_SYS_MEMTEST_SCRATCH 127 128 /* Enable temporary baudrate change while serial download */ 129 #undef CONFIG_SYS_LOADS_BAUD_CHANGE 130 131 /* FLASH */ 132 #define CONFIG_FLASH_CFI_DRIVER 1 133 #define CONFIG_SYS_FLASH_CFI 134 #undef CONFIG_SYS_FLASH_QUIET_TEST 135 #define CONFIG_SYS_FLASH_EMPTY_INFO 136 #define CONFIG_SYS_FLASH_BASE (0xA0000000) 137 #define CONFIG_SYS_MAX_FLASH_SECT 512 138 139 /* if you use all NOR Flash , you change dip-switch. Please see Manual. */ 140 #define CONFIG_SYS_MAX_FLASH_BANKS 1 141 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 142 143 /* Timeout for Flash erase operations (in ms) */ 144 #define CONFIG_SYS_FLASH_ERASE_TOUT (3 * 1000) 145 /* Timeout for Flash write operations (in ms) */ 146 #define CONFIG_SYS_FLASH_WRITE_TOUT (3 * 1000) 147 /* Timeout for Flash set sector lock bit operations (in ms) */ 148 #define CONFIG_SYS_FLASH_LOCK_TOUT (3 * 1000) 149 /* Timeout for Flash clear lock bit operations (in ms) */ 150 #define CONFIG_SYS_FLASH_UNLOCK_TOUT (3 * 1000) 151 152 /* 153 * Use hardware flash sectors protection instead 154 * of U-Boot software protection 155 */ 156 #undef CONFIG_SYS_FLASH_PROTECTION 157 #undef CONFIG_SYS_DIRECT_FLASH_TFTP 158 159 /* Address of u-boot image in Flash (NOT run time address in SDRAM) ?!? */ 160 #define CONFIG_SYS_MONITOR_BASE (CONFIG_SYS_FLASH_BASE) 161 /* Monitor size */ 162 #define CONFIG_SYS_MONITOR_LEN (256 * 1024) 163 /* Size of DRAM reserved for malloc() use */ 164 #define CONFIG_SYS_MALLOC_LEN (256 * 1024) 165 /* size in bytes reserved for initial data */ 166 #define CONFIG_SYS_GBL_DATA_SIZE (256) 167 #define CONFIG_SYS_BOOTMAPSZ (8 * 1024 * 1024) 168 169 /* ENV setting */ 170 #define CONFIG_ENV_IS_IN_FLASH 171 #define CONFIG_ENV_OVERWRITE 1 172 #define CONFIG_ENV_SECT_SIZE (128 * 1024) 173 #define CONFIG_ENV_SIZE (CONFIG_ENV_SECT_SIZE) 174 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN) 175 /* Offset of env Flash sector relative to CONFIG_SYS_FLASH_BASE */ 176 #define CONFIG_ENV_OFFSET (CONFIG_ENV_ADDR - CONFIG_SYS_FLASH_BASE) 177 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SECT_SIZE) 178 179 /* Board Clock */ 180 #define CONFIG_SYS_CLK_FREQ 41666666 181 #define CONFIG_SH_TMU_CLK_FREQ CONFIG_SYS_CLK_FREQ 182 #define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ 183 #define CONFIG_SYS_TMU_CLK_DIV 4 184 185 #endif /* __ECOVEC_H */ 186