1eb0b43f2SJens Scharsig /* 2eb0b43f2SJens Scharsig * Configuation settings for the BuS EB+CPU5283 boards (aka EB+MCF-EV123) 3eb0b43f2SJens Scharsig * 4eb0b43f2SJens Scharsig * (C) Copyright 2005-2009 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de> 5eb0b43f2SJens Scharsig * 6*1a459660SWolfgang Denk * SPDX-License-Identifier: GPL-2.0+ 7eb0b43f2SJens Scharsig */ 8eb0b43f2SJens Scharsig 9eb0b43f2SJens Scharsig #ifndef _CONFIG_EB_CPU5282_H_ 10eb0b43f2SJens Scharsig #define _CONFIG_EB_CPU5282_H_ 11eb0b43f2SJens Scharsig 12eb0b43f2SJens Scharsig #undef CONFIG_SYS_HALT_BEFOR_RAM_JUMP 13eb0b43f2SJens Scharsig 14eb0b43f2SJens Scharsig /*----------------------------------------------------------------------* 15eb0b43f2SJens Scharsig * High Level Configuration Options (easy to change) * 16eb0b43f2SJens Scharsig *----------------------------------------------------------------------*/ 17eb0b43f2SJens Scharsig 18eb0b43f2SJens Scharsig #define CONFIG_MCF52x2 /* define processor family */ 19eb0b43f2SJens Scharsig #define CONFIG_M5282 /* define processor type */ 20eb0b43f2SJens Scharsig 21eb0b43f2SJens Scharsig #define CONFIG_MISC_INIT_R 22eb0b43f2SJens Scharsig 23eb0b43f2SJens Scharsig #define CONFIG_MCFUART 24eb0b43f2SJens Scharsig #define CONFIG_SYS_UART_PORT (0) 25d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_BAUDRATE 115200 26eb0b43f2SJens Scharsig 27eb0b43f2SJens Scharsig #undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */ 28eb0b43f2SJens Scharsig 29eb0b43f2SJens Scharsig #define CONFIG_BOOTCOMMAND "printenv" 30eb0b43f2SJens Scharsig 31eb0b43f2SJens Scharsig /*----------------------------------------------------------------------* 32eb0b43f2SJens Scharsig * Options * 33eb0b43f2SJens Scharsig *----------------------------------------------------------------------*/ 34eb0b43f2SJens Scharsig 35eb0b43f2SJens Scharsig #define CONFIG_BOOT_RETRY_TIME -1 36eb0b43f2SJens Scharsig #define CONFIG_RESET_TO_RETRY 37eb0b43f2SJens Scharsig #define CONFIG_SPLASH_SCREEN 38eb0b43f2SJens Scharsig 39d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_HW_WATCHDOG 40d858c335SJens Scharsig (BuS Elektronik) 41d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_STATUS_LED 42d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_BOARD_SPECIFIC_LED 43d858c335SJens Scharsig (BuS Elektronik) #define STATUS_LED_ACTIVE 0 44d858c335SJens Scharsig (BuS Elektronik) #define STATUS_LED_BIT 0x0008 /* Timer7 GPIO */ 45d858c335SJens Scharsig (BuS Elektronik) #define STATUS_LED_BOOT 0 46d858c335SJens Scharsig (BuS Elektronik) #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 47d858c335SJens Scharsig (BuS Elektronik) #define STATUS_LED_STATE STATUS_LED_OFF 48d858c335SJens Scharsig (BuS Elektronik) 49eb0b43f2SJens Scharsig /*----------------------------------------------------------------------* 50eb0b43f2SJens Scharsig * Configuration for environment * 51eb0b43f2SJens Scharsig * Environment is in the second sector of the first 256k of flash * 52eb0b43f2SJens Scharsig *----------------------------------------------------------------------*/ 53eb0b43f2SJens Scharsig 54d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_ENV_ADDR 0xFF040000 55d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_ENV_SECT_SIZE 0x00020000 56eb0b43f2SJens Scharsig #define CONFIG_ENV_IS_IN_FLASH 1 57eb0b43f2SJens Scharsig 58eb0b43f2SJens Scharsig /* 59eb0b43f2SJens Scharsig * BOOTP options 60eb0b43f2SJens Scharsig */ 61eb0b43f2SJens Scharsig #define CONFIG_BOOTP_BOOTFILESIZE 62eb0b43f2SJens Scharsig #define CONFIG_BOOTP_BOOTPATH 63eb0b43f2SJens Scharsig #define CONFIG_BOOTP_GATEWAY 64eb0b43f2SJens Scharsig #define CONFIG_BOOTP_HOSTNAME 65eb0b43f2SJens Scharsig 66eb0b43f2SJens Scharsig /* 67eb0b43f2SJens Scharsig * Command line configuration. 68eb0b43f2SJens Scharsig */ 69d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_CMDLINE_EDITING 70eb0b43f2SJens Scharsig #include <config_cmd_default.h> 71eb0b43f2SJens Scharsig 72eb0b43f2SJens Scharsig #undef CONFIG_CMD_LOADB 73d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_CMD_DATE 74d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_CMD_DHCP 75d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_CMD_I2C 76d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_CMD_LED 77eb0b43f2SJens Scharsig #define CONFIG_CMD_MII 78eb0b43f2SJens Scharsig #define CONFIG_CMD_NET 79eb0b43f2SJens Scharsig 80eb0b43f2SJens Scharsig #define CONFIG_MCFTMR 81eb0b43f2SJens Scharsig 82eb0b43f2SJens Scharsig #define CONFIG_BOOTDELAY 5 83eb0b43f2SJens Scharsig #define CONFIG_SYS_PROMPT "\nEB+CPU5282> " 84eb0b43f2SJens Scharsig #define CONFIG_SYS_LONGHELP 1 85eb0b43f2SJens Scharsig 86eb0b43f2SJens Scharsig #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 87eb0b43f2SJens Scharsig #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 88eb0b43f2SJens Scharsig #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 89eb0b43f2SJens Scharsig #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 90eb0b43f2SJens Scharsig 91eb0b43f2SJens Scharsig #define CONFIG_SYS_LOAD_ADDR 0x20000 92eb0b43f2SJens Scharsig 93eb0b43f2SJens Scharsig #define CONFIG_SYS_MEMTEST_START 0x100000 94eb0b43f2SJens Scharsig #define CONFIG_SYS_MEMTEST_END 0x400000 95eb0b43f2SJens Scharsig /*#define CONFIG_SYS_DRAM_TEST 1 */ 96eb0b43f2SJens Scharsig #undef CONFIG_SYS_DRAM_TEST 97eb0b43f2SJens Scharsig 98eb0b43f2SJens Scharsig /*----------------------------------------------------------------------* 99eb0b43f2SJens Scharsig * Clock and PLL Configuration * 100eb0b43f2SJens Scharsig *----------------------------------------------------------------------*/ 101d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_HZ 1000 102d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CLK 80000000 /* 8MHz * 8 */ 103eb0b43f2SJens Scharsig 104d858c335SJens Scharsig (BuS Elektronik) /* PLL Configuration: Ext Clock * 8 (see table 9-4 of MCF user manual) */ 105eb0b43f2SJens Scharsig 106d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */ 107eb0b43f2SJens Scharsig #define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */ 108eb0b43f2SJens Scharsig 109eb0b43f2SJens Scharsig /*----------------------------------------------------------------------* 110eb0b43f2SJens Scharsig * Network * 111eb0b43f2SJens Scharsig *----------------------------------------------------------------------*/ 112eb0b43f2SJens Scharsig 113eb0b43f2SJens Scharsig #define CONFIG_MCFFEC 114eb0b43f2SJens Scharsig #define CONFIG_MII 1 115eb0b43f2SJens Scharsig #define CONFIG_MII_INIT 1 116eb0b43f2SJens Scharsig #define CONFIG_SYS_DISCOVER_PHY 117eb0b43f2SJens Scharsig #define CONFIG_SYS_RX_ETH_BUFFER 8 118eb0b43f2SJens Scharsig #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 119eb0b43f2SJens Scharsig 120eb0b43f2SJens Scharsig #define CONFIG_SYS_FEC0_PINMUX 0 121eb0b43f2SJens Scharsig #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 122eb0b43f2SJens Scharsig #define MCFFEC_TOUT_LOOP 50000 123eb0b43f2SJens Scharsig 124eb0b43f2SJens Scharsig #define CONFIG_OVERWRITE_ETHADDR_ONCE 125eb0b43f2SJens Scharsig 126eb0b43f2SJens Scharsig /*------------------------------------------------------------------------- 127eb0b43f2SJens Scharsig * Low Level Configuration Settings 128eb0b43f2SJens Scharsig * (address mappings, register initial values, etc.) 129eb0b43f2SJens Scharsig * You should know what you are doing if you make changes here. 130eb0b43f2SJens Scharsig *-----------------------------------------------------------------------*/ 131eb0b43f2SJens Scharsig 132eb0b43f2SJens Scharsig #define CONFIG_SYS_MBAR 0x40000000 133eb0b43f2SJens Scharsig 134eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 135eb0b43f2SJens Scharsig * Definitions for initial stack pointer and data area (in DPRAM) 136eb0b43f2SJens Scharsig *-----------------------------------------------------------------------*/ 137eb0b43f2SJens Scharsig 138eb0b43f2SJens Scharsig #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 139eb0b43f2SJens Scharsig #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 140eb0b43f2SJens Scharsig #define CONFIG_SYS_GBL_DATA_OFFSET \ 141eb0b43f2SJens Scharsig (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 142eb0b43f2SJens Scharsig #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 143eb0b43f2SJens Scharsig 144eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 145eb0b43f2SJens Scharsig * Start addresses for the final memory configuration 146eb0b43f2SJens Scharsig * (Set up by the startup code) 147eb0b43f2SJens Scharsig * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 148eb0b43f2SJens Scharsig */ 149d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_SDRAM_BASE0 0x00000000 150d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_SDRAM_SIZE0 16 /* SDRAM size in MB */ 151eb0b43f2SJens Scharsig 152d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0 153d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0 154eb0b43f2SJens Scharsig 155eb0b43f2SJens Scharsig #define CONFIG_SYS_MONITOR_LEN 0x20000 156eb0b43f2SJens Scharsig #define CONFIG_SYS_MALLOC_LEN (256 << 10) 157eb0b43f2SJens Scharsig #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 158eb0b43f2SJens Scharsig 159eb0b43f2SJens Scharsig /* 160eb0b43f2SJens Scharsig * For booting Linux, the board info and command line data 161eb0b43f2SJens Scharsig * have to be in the first 8 MB of memory, since this is 162eb0b43f2SJens Scharsig * the maximum mapped by the Linux kernel during initialization ?? 163eb0b43f2SJens Scharsig */ 164eb0b43f2SJens Scharsig #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 165eb0b43f2SJens Scharsig 166eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 167eb0b43f2SJens Scharsig * FLASH organization 168eb0b43f2SJens Scharsig */ 169d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_FLASH_SHOW_PROGRESS 45 170eb0b43f2SJens Scharsig 171eb0b43f2SJens Scharsig #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 172eb0b43f2SJens Scharsig #define CONFIG_SYS_INT_FLASH_BASE 0xF0000000 173eb0b43f2SJens Scharsig #define CONFIG_SYS_INT_FLASH_ENABLE 0x21 174eb0b43f2SJens Scharsig 175d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_MAX_FLASH_SECT 128 176d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_MAX_FLASH_BANKS 1 177eb0b43f2SJens Scharsig #define CONFIG_SYS_FLASH_ERASE_TOUT 10000000 178eb0b43f2SJens Scharsig #define CONFIG_SYS_FLASH_PROTECTION 179eb0b43f2SJens Scharsig 180d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_FLASH_CFI 181d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_FLASH_CFI_DRIVER 182d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_FLASH_SIZE 16*1024*1024 183d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 184d858c335SJens Scharsig (BuS Elektronik) 185d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 186d858c335SJens Scharsig (BuS Elektronik) 187eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 188eb0b43f2SJens Scharsig * Cache Configuration 189eb0b43f2SJens Scharsig */ 190eb0b43f2SJens Scharsig #define CONFIG_SYS_CACHELINE_SIZE 16 191eb0b43f2SJens Scharsig 192eb0b43f2SJens Scharsig #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 193eb0b43f2SJens Scharsig CONFIG_SYS_INIT_RAM_SIZE - 8) 194eb0b43f2SJens Scharsig #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 195eb0b43f2SJens Scharsig CONFIG_SYS_INIT_RAM_SIZE - 4) 196eb0b43f2SJens Scharsig #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) 197eb0b43f2SJens Scharsig #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 198eb0b43f2SJens Scharsig CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 199eb0b43f2SJens Scharsig CF_ACR_EN | CF_ACR_SM_ALL) 200eb0b43f2SJens Scharsig #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ 201eb0b43f2SJens Scharsig CF_CACR_CEIB | CF_CACR_DBWE | \ 202eb0b43f2SJens Scharsig CF_CACR_EUSP) 203eb0b43f2SJens Scharsig 204eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 205eb0b43f2SJens Scharsig * Memory bank definitions 206eb0b43f2SJens Scharsig */ 207eb0b43f2SJens Scharsig 208d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS0_BASE 0xFF000000 209eb0b43f2SJens Scharsig #define CONFIG_SYS_CS0_CTRL 0x00001980 210d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS0_MASK 0x00FF0001 211eb0b43f2SJens Scharsig 212d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS2_BASE 0xE0000000 213d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS2_CTRL 0x00001980 214d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS2_MASK 0x000F0001 215d858c335SJens Scharsig (BuS Elektronik) 216d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS3_BASE 0xE0100000 217d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS3_CTRL 0x00001980 218eb0b43f2SJens Scharsig #define CONFIG_SYS_CS3_MASK 0x000F0001 219eb0b43f2SJens Scharsig 220eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 221eb0b43f2SJens Scharsig * Port configuration 222eb0b43f2SJens Scharsig */ 223eb0b43f2SJens Scharsig #define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */ 224eb0b43f2SJens Scharsig #define CONFIG_SYS_PADDR 0x0000000 225eb0b43f2SJens Scharsig #define CONFIG_SYS_PADAT 0x0000000 226eb0b43f2SJens Scharsig 227eb0b43f2SJens Scharsig #define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */ 228eb0b43f2SJens Scharsig #define CONFIG_SYS_PBDDR 0x0000000 229eb0b43f2SJens Scharsig #define CONFIG_SYS_PBDAT 0x0000000 230eb0b43f2SJens Scharsig 231eb0b43f2SJens Scharsig #define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */ 232eb0b43f2SJens Scharsig #define CONFIG_SYS_PCDDR 0x0000000 233eb0b43f2SJens Scharsig #define CONFIG_SYS_PCDAT 0x0000000 234eb0b43f2SJens Scharsig 235eb0b43f2SJens Scharsig #define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */ 236eb0b43f2SJens Scharsig #define CONFIG_SYS_PCDDR 0x0000000 237eb0b43f2SJens Scharsig #define CONFIG_SYS_PCDAT 0x0000000 238eb0b43f2SJens Scharsig 239d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_PASPAR 0x0F0F 240eb0b43f2SJens Scharsig #define CONFIG_SYS_PEHLPAR 0xC0 241eb0b43f2SJens Scharsig #define CONFIG_SYS_PUAPAR 0x0F 242eb0b43f2SJens Scharsig #define CONFIG_SYS_DDRUA 0x05 243eb0b43f2SJens Scharsig #define CONFIG_SYS_PJPAR 0xFF 244eb0b43f2SJens Scharsig 245eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 246d858c335SJens Scharsig (BuS Elektronik) * I2C 247d858c335SJens Scharsig (BuS Elektronik) */ 248d858c335SJens Scharsig (BuS Elektronik) 249d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_HARD_I2C 250d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_FSL_I2C 251d858c335SJens Scharsig (BuS Elektronik) 252d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_I2C_OFFSET 0x00000300 253d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 254d858c335SJens Scharsig (BuS Elektronik) 255d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_I2C_SPEED 100000 256d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_I2C_SLAVE 0 257d858c335SJens Scharsig (BuS Elektronik) 258d858c335SJens Scharsig (BuS Elektronik) #ifdef CONFIG_CMD_DATE 259d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_RTC_DS1338 260d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_I2C_RTC_ADDR 0x68 261d858c335SJens Scharsig (BuS Elektronik) #endif 262d858c335SJens Scharsig (BuS Elektronik) 263d858c335SJens Scharsig (BuS Elektronik) /*----------------------------------------------------------------------- 264eb0b43f2SJens Scharsig * VIDEO configuration 265eb0b43f2SJens Scharsig */ 266eb0b43f2SJens Scharsig 267eb0b43f2SJens Scharsig #define CONFIG_VIDEO 268eb0b43f2SJens Scharsig 269eb0b43f2SJens Scharsig #ifdef CONFIG_VIDEO 270eb0b43f2SJens Scharsig #define CONFIG_VIDEO_VCXK 1 271eb0b43f2SJens Scharsig 272eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 2 273eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_DOUBLEBUFFERED 1 274d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS2_BASE 275eb0b43f2SJens Scharsig 276eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT 277eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR 278eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN 0x0001 279eb0b43f2SJens Scharsig 280eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_ENABLE_PORT MCFGPTB_GPTPORT 281eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_ENABLE_DDR MCFGPTB_GPTDDR 282eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_ENABLE_PIN 0x0002 283eb0b43f2SJens Scharsig 284eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_REQUEST_PORT MCFGPTB_GPTPORT 285eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_REQUEST_DDR MCFGPTB_GPTDDR 286eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_REQUEST_PIN 0x0004 287eb0b43f2SJens Scharsig 288eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_INVERT_PORT MCFGPIO_PORTE 289eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_INVERT_DDR MCFGPIO_DDRE 290eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_INVERT_PIN MCFGPIO_PORT2 291eb0b43f2SJens Scharsig 292eb0b43f2SJens Scharsig #endif /* CONFIG_VIDEO */ 293eb0b43f2SJens Scharsig #endif /* _CONFIG_M5282EVB_H */ 294eb0b43f2SJens Scharsig /*---------------------------------------------------------------------*/ 295