1eb0b43f2SJens Scharsig /* 2eb0b43f2SJens Scharsig * Configuation settings for the BuS EB+CPU5283 boards (aka EB+MCF-EV123) 3eb0b43f2SJens Scharsig * 4eb0b43f2SJens Scharsig * (C) Copyright 2005-2009 BuS Elektronik GmbH & Co.KG <esw@bus-elektonik.de> 5eb0b43f2SJens Scharsig * 6eb0b43f2SJens Scharsig * See file CREDITS for list of people who contributed to this 7eb0b43f2SJens Scharsig * project. 8eb0b43f2SJens Scharsig * 9eb0b43f2SJens Scharsig * This program is free software; you can redistribute it and/or 10eb0b43f2SJens Scharsig * modify it under the terms of the GNU General Public License as 11eb0b43f2SJens Scharsig * published by the Free Software Foundation; either version 2 of 12eb0b43f2SJens Scharsig * the License, or (at your option) any later version. 13eb0b43f2SJens Scharsig * 14eb0b43f2SJens Scharsig * This program is distributed in the hope that it will be useful, 15eb0b43f2SJens Scharsig * but WITHOUT ANY WARRANTY; without even the implied warranty of 16eb0b43f2SJens Scharsig * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17eb0b43f2SJens Scharsig * GNU General Public License for more details. 18eb0b43f2SJens Scharsig * 19eb0b43f2SJens Scharsig * You should have received a copy of the GNU General Public License 20eb0b43f2SJens Scharsig * along with this program; if not, write to the Free Software 21eb0b43f2SJens Scharsig * Foundation, Inc., 59 Temple Place, Suite 330, Boston, 22eb0b43f2SJens Scharsig * MA 02111-1307 USA 23eb0b43f2SJens Scharsig */ 24eb0b43f2SJens Scharsig 25eb0b43f2SJens Scharsig #ifndef _CONFIG_EB_CPU5282_H_ 26eb0b43f2SJens Scharsig #define _CONFIG_EB_CPU5282_H_ 27eb0b43f2SJens Scharsig 28eb0b43f2SJens Scharsig #undef CONFIG_SYS_HALT_BEFOR_RAM_JUMP 29eb0b43f2SJens Scharsig 30eb0b43f2SJens Scharsig /*----------------------------------------------------------------------* 31eb0b43f2SJens Scharsig * High Level Configuration Options (easy to change) * 32eb0b43f2SJens Scharsig *----------------------------------------------------------------------*/ 33eb0b43f2SJens Scharsig 34eb0b43f2SJens Scharsig #define CONFIG_MCF52x2 /* define processor family */ 35eb0b43f2SJens Scharsig #define CONFIG_M5282 /* define processor type */ 36eb0b43f2SJens Scharsig 37eb0b43f2SJens Scharsig #define CONFIG_MISC_INIT_R 38eb0b43f2SJens Scharsig 39eb0b43f2SJens Scharsig #define CONFIG_MCFUART 40eb0b43f2SJens Scharsig #define CONFIG_SYS_UART_PORT (0) 41d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_BAUDRATE 115200 42eb0b43f2SJens Scharsig 43eb0b43f2SJens Scharsig #undef CONFIG_MONITOR_IS_IN_RAM /* starts uboot direct */ 44eb0b43f2SJens Scharsig 45eb0b43f2SJens Scharsig #define CONFIG_BOOTCOMMAND "printenv" 46eb0b43f2SJens Scharsig 47eb0b43f2SJens Scharsig /*----------------------------------------------------------------------* 48eb0b43f2SJens Scharsig * Options * 49eb0b43f2SJens Scharsig *----------------------------------------------------------------------*/ 50eb0b43f2SJens Scharsig 51eb0b43f2SJens Scharsig #define CONFIG_BOOT_RETRY_TIME -1 52eb0b43f2SJens Scharsig #define CONFIG_RESET_TO_RETRY 53eb0b43f2SJens Scharsig #define CONFIG_SPLASH_SCREEN 54eb0b43f2SJens Scharsig 55d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_HW_WATCHDOG 56d858c335SJens Scharsig (BuS Elektronik) 57d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_STATUS_LED 58d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_BOARD_SPECIFIC_LED 59d858c335SJens Scharsig (BuS Elektronik) #define STATUS_LED_ACTIVE 0 60d858c335SJens Scharsig (BuS Elektronik) #define STATUS_LED_BIT 0x0008 /* Timer7 GPIO */ 61d858c335SJens Scharsig (BuS Elektronik) #define STATUS_LED_BOOT 0 62d858c335SJens Scharsig (BuS Elektronik) #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 2) 63d858c335SJens Scharsig (BuS Elektronik) #define STATUS_LED_STATE STATUS_LED_OFF 64d858c335SJens Scharsig (BuS Elektronik) 65eb0b43f2SJens Scharsig /*----------------------------------------------------------------------* 66eb0b43f2SJens Scharsig * Configuration for environment * 67eb0b43f2SJens Scharsig * Environment is in the second sector of the first 256k of flash * 68eb0b43f2SJens Scharsig *----------------------------------------------------------------------*/ 69eb0b43f2SJens Scharsig 70d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_ENV_ADDR 0xFF040000 71d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_ENV_SECT_SIZE 0x00020000 72eb0b43f2SJens Scharsig #define CONFIG_ENV_IS_IN_FLASH 1 73eb0b43f2SJens Scharsig 74eb0b43f2SJens Scharsig /* 75eb0b43f2SJens Scharsig * BOOTP options 76eb0b43f2SJens Scharsig */ 77eb0b43f2SJens Scharsig #define CONFIG_BOOTP_BOOTFILESIZE 78eb0b43f2SJens Scharsig #define CONFIG_BOOTP_BOOTPATH 79eb0b43f2SJens Scharsig #define CONFIG_BOOTP_GATEWAY 80eb0b43f2SJens Scharsig #define CONFIG_BOOTP_HOSTNAME 81eb0b43f2SJens Scharsig 82eb0b43f2SJens Scharsig /* 83eb0b43f2SJens Scharsig * Command line configuration. 84eb0b43f2SJens Scharsig */ 85d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_CMDLINE_EDITING 86eb0b43f2SJens Scharsig #include <config_cmd_default.h> 87eb0b43f2SJens Scharsig 88eb0b43f2SJens Scharsig #undef CONFIG_CMD_LOADB 89d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_CMD_DATE 90d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_CMD_DHCP 91d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_CMD_I2C 92d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_CMD_LED 93eb0b43f2SJens Scharsig #define CONFIG_CMD_MII 94eb0b43f2SJens Scharsig #define CONFIG_CMD_NET 95eb0b43f2SJens Scharsig 96eb0b43f2SJens Scharsig #define CONFIG_MCFTMR 97eb0b43f2SJens Scharsig 98eb0b43f2SJens Scharsig #define CONFIG_BOOTDELAY 5 99eb0b43f2SJens Scharsig #define CONFIG_SYS_PROMPT "\nEB+CPU5282> " 100eb0b43f2SJens Scharsig #define CONFIG_SYS_LONGHELP 1 101eb0b43f2SJens Scharsig 102eb0b43f2SJens Scharsig #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */ 103eb0b43f2SJens Scharsig #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16) 104eb0b43f2SJens Scharsig #define CONFIG_SYS_MAXARGS 16 /* max number of command args */ 105eb0b43f2SJens Scharsig #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE 106eb0b43f2SJens Scharsig 107eb0b43f2SJens Scharsig #define CONFIG_SYS_LOAD_ADDR 0x20000 108eb0b43f2SJens Scharsig 109eb0b43f2SJens Scharsig #define CONFIG_SYS_MEMTEST_START 0x100000 110eb0b43f2SJens Scharsig #define CONFIG_SYS_MEMTEST_END 0x400000 111eb0b43f2SJens Scharsig /*#define CONFIG_SYS_DRAM_TEST 1 */ 112eb0b43f2SJens Scharsig #undef CONFIG_SYS_DRAM_TEST 113eb0b43f2SJens Scharsig 114eb0b43f2SJens Scharsig /*----------------------------------------------------------------------* 115eb0b43f2SJens Scharsig * Clock and PLL Configuration * 116eb0b43f2SJens Scharsig *----------------------------------------------------------------------*/ 117d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_HZ 1000 118d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CLK 80000000 /* 8MHz * 8 */ 119eb0b43f2SJens Scharsig 120d858c335SJens Scharsig (BuS Elektronik) /* PLL Configuration: Ext Clock * 8 (see table 9-4 of MCF user manual) */ 121eb0b43f2SJens Scharsig 122d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_MFD 0x02 /* PLL Multiplication Factor Devider */ 123eb0b43f2SJens Scharsig #define CONFIG_SYS_RFD 0x00 /* PLL Reduce Frecuency Devider */ 124eb0b43f2SJens Scharsig 125eb0b43f2SJens Scharsig /*----------------------------------------------------------------------* 126eb0b43f2SJens Scharsig * Network * 127eb0b43f2SJens Scharsig *----------------------------------------------------------------------*/ 128eb0b43f2SJens Scharsig 129eb0b43f2SJens Scharsig #define CONFIG_MCFFEC 130eb0b43f2SJens Scharsig #define CONFIG_MII 1 131eb0b43f2SJens Scharsig #define CONFIG_MII_INIT 1 132eb0b43f2SJens Scharsig #define CONFIG_SYS_DISCOVER_PHY 133eb0b43f2SJens Scharsig #define CONFIG_SYS_RX_ETH_BUFFER 8 134eb0b43f2SJens Scharsig #define CONFIG_SYS_FAULT_ECHO_LINK_DOWN 135eb0b43f2SJens Scharsig 136eb0b43f2SJens Scharsig #define CONFIG_SYS_FEC0_PINMUX 0 137eb0b43f2SJens Scharsig #define CONFIG_SYS_FEC0_MIIBASE CONFIG_SYS_FEC0_IOBASE 138eb0b43f2SJens Scharsig #define MCFFEC_TOUT_LOOP 50000 139eb0b43f2SJens Scharsig 140eb0b43f2SJens Scharsig #define CONFIG_OVERWRITE_ETHADDR_ONCE 141eb0b43f2SJens Scharsig 142eb0b43f2SJens Scharsig /*------------------------------------------------------------------------- 143eb0b43f2SJens Scharsig * Low Level Configuration Settings 144eb0b43f2SJens Scharsig * (address mappings, register initial values, etc.) 145eb0b43f2SJens Scharsig * You should know what you are doing if you make changes here. 146eb0b43f2SJens Scharsig *-----------------------------------------------------------------------*/ 147eb0b43f2SJens Scharsig 148eb0b43f2SJens Scharsig #define CONFIG_SYS_MBAR 0x40000000 149eb0b43f2SJens Scharsig 150eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 151eb0b43f2SJens Scharsig * Definitions for initial stack pointer and data area (in DPRAM) 152eb0b43f2SJens Scharsig *-----------------------------------------------------------------------*/ 153eb0b43f2SJens Scharsig 154eb0b43f2SJens Scharsig #define CONFIG_SYS_INIT_RAM_ADDR 0x20000000 155eb0b43f2SJens Scharsig #define CONFIG_SYS_INIT_RAM_SIZE 0x10000 156eb0b43f2SJens Scharsig #define CONFIG_SYS_GBL_DATA_OFFSET \ 157eb0b43f2SJens Scharsig (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE) 158eb0b43f2SJens Scharsig #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET 159eb0b43f2SJens Scharsig 160eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 161eb0b43f2SJens Scharsig * Start addresses for the final memory configuration 162eb0b43f2SJens Scharsig * (Set up by the startup code) 163eb0b43f2SJens Scharsig * Please note that CONFIG_SYS_SDRAM_BASE _must_ start at 0 164eb0b43f2SJens Scharsig */ 165d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_SDRAM_BASE0 0x00000000 166d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_SDRAM_SIZE0 16 /* SDRAM size in MB */ 167eb0b43f2SJens Scharsig 168d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_SDRAM_BASE0 169d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_SDRAM_SIZE CONFIG_SYS_SDRAM_SIZE0 170eb0b43f2SJens Scharsig 171eb0b43f2SJens Scharsig #define CONFIG_SYS_MONITOR_LEN 0x20000 172eb0b43f2SJens Scharsig #define CONFIG_SYS_MALLOC_LEN (256 << 10) 173eb0b43f2SJens Scharsig #define CONFIG_SYS_BOOTPARAMS_LEN 64*1024 174eb0b43f2SJens Scharsig 175eb0b43f2SJens Scharsig /* 176eb0b43f2SJens Scharsig * For booting Linux, the board info and command line data 177eb0b43f2SJens Scharsig * have to be in the first 8 MB of memory, since this is 178eb0b43f2SJens Scharsig * the maximum mapped by the Linux kernel during initialization ?? 179eb0b43f2SJens Scharsig */ 180eb0b43f2SJens Scharsig #define CONFIG_SYS_BOOTMAPSZ (8 << 20) /* Initial Memory map for Linux */ 181eb0b43f2SJens Scharsig 182eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 183eb0b43f2SJens Scharsig * FLASH organization 184eb0b43f2SJens Scharsig */ 185d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_FLASH_SHOW_PROGRESS 45 186eb0b43f2SJens Scharsig 187eb0b43f2SJens Scharsig #define CONFIG_SYS_FLASH_BASE CONFIG_SYS_CS0_BASE 188eb0b43f2SJens Scharsig #define CONFIG_SYS_INT_FLASH_BASE 0xF0000000 189eb0b43f2SJens Scharsig #define CONFIG_SYS_INT_FLASH_ENABLE 0x21 190eb0b43f2SJens Scharsig 191d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_MAX_FLASH_SECT 128 192d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_MAX_FLASH_BANKS 1 193eb0b43f2SJens Scharsig #define CONFIG_SYS_FLASH_ERASE_TOUT 10000000 194eb0b43f2SJens Scharsig #define CONFIG_SYS_FLASH_PROTECTION 195eb0b43f2SJens Scharsig 196d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_FLASH_CFI 197d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_FLASH_CFI_DRIVER 198d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_FLASH_SIZE 16*1024*1024 199d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 200d858c335SJens Scharsig (BuS Elektronik) 201d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE } 202d858c335SJens Scharsig (BuS Elektronik) 203eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 204eb0b43f2SJens Scharsig * Cache Configuration 205eb0b43f2SJens Scharsig */ 206eb0b43f2SJens Scharsig #define CONFIG_SYS_CACHELINE_SIZE 16 207eb0b43f2SJens Scharsig 208eb0b43f2SJens Scharsig #define ICACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 209eb0b43f2SJens Scharsig CONFIG_SYS_INIT_RAM_SIZE - 8) 210eb0b43f2SJens Scharsig #define DCACHE_STATUS (CONFIG_SYS_INIT_RAM_ADDR + \ 211eb0b43f2SJens Scharsig CONFIG_SYS_INIT_RAM_SIZE - 4) 212eb0b43f2SJens Scharsig #define CONFIG_SYS_ICACHE_INV (CF_CACR_CINV + CF_CACR_DCM) 213eb0b43f2SJens Scharsig #define CONFIG_SYS_CACHE_ACR0 (CONFIG_SYS_SDRAM_BASE | \ 214eb0b43f2SJens Scharsig CF_ADDRMASK(CONFIG_SYS_SDRAM_SIZE) | \ 215eb0b43f2SJens Scharsig CF_ACR_EN | CF_ACR_SM_ALL) 216eb0b43f2SJens Scharsig #define CONFIG_SYS_CACHE_ICACR (CF_CACR_CENB | CF_CACR_DISD | \ 217eb0b43f2SJens Scharsig CF_CACR_CEIB | CF_CACR_DBWE | \ 218eb0b43f2SJens Scharsig CF_CACR_EUSP) 219eb0b43f2SJens Scharsig 220eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 221eb0b43f2SJens Scharsig * Memory bank definitions 222eb0b43f2SJens Scharsig */ 223eb0b43f2SJens Scharsig 224d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS0_BASE 0xFF000000 225eb0b43f2SJens Scharsig #define CONFIG_SYS_CS0_CTRL 0x00001980 226d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS0_MASK 0x00FF0001 227eb0b43f2SJens Scharsig 228d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS2_BASE 0xE0000000 229d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS2_CTRL 0x00001980 230d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS2_MASK 0x000F0001 231d858c335SJens Scharsig (BuS Elektronik) 232d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS3_BASE 0xE0100000 233d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_CS3_CTRL 0x00001980 234eb0b43f2SJens Scharsig #define CONFIG_SYS_CS3_MASK 0x000F0001 235eb0b43f2SJens Scharsig 236eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 237eb0b43f2SJens Scharsig * Port configuration 238eb0b43f2SJens Scharsig */ 239eb0b43f2SJens Scharsig #define CONFIG_SYS_PACNT 0x0000000 /* Port A D[31:24] */ 240eb0b43f2SJens Scharsig #define CONFIG_SYS_PADDR 0x0000000 241eb0b43f2SJens Scharsig #define CONFIG_SYS_PADAT 0x0000000 242eb0b43f2SJens Scharsig 243eb0b43f2SJens Scharsig #define CONFIG_SYS_PBCNT 0x0000000 /* Port B D[23:16] */ 244eb0b43f2SJens Scharsig #define CONFIG_SYS_PBDDR 0x0000000 245eb0b43f2SJens Scharsig #define CONFIG_SYS_PBDAT 0x0000000 246eb0b43f2SJens Scharsig 247eb0b43f2SJens Scharsig #define CONFIG_SYS_PCCNT 0x0000000 /* Port C D[15:08] */ 248eb0b43f2SJens Scharsig #define CONFIG_SYS_PCDDR 0x0000000 249eb0b43f2SJens Scharsig #define CONFIG_SYS_PCDAT 0x0000000 250eb0b43f2SJens Scharsig 251eb0b43f2SJens Scharsig #define CONFIG_SYS_PDCNT 0x0000000 /* Port D D[07:00] */ 252eb0b43f2SJens Scharsig #define CONFIG_SYS_PCDDR 0x0000000 253eb0b43f2SJens Scharsig #define CONFIG_SYS_PCDAT 0x0000000 254eb0b43f2SJens Scharsig 255d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_PASPAR 0x0F0F 256eb0b43f2SJens Scharsig #define CONFIG_SYS_PEHLPAR 0xC0 257eb0b43f2SJens Scharsig #define CONFIG_SYS_PUAPAR 0x0F 258eb0b43f2SJens Scharsig #define CONFIG_SYS_DDRUA 0x05 259eb0b43f2SJens Scharsig #define CONFIG_SYS_PJPAR 0xFF 260eb0b43f2SJens Scharsig 261eb0b43f2SJens Scharsig /*----------------------------------------------------------------------- 262d858c335SJens Scharsig (BuS Elektronik) * I2C 263d858c335SJens Scharsig (BuS Elektronik) */ 264d858c335SJens Scharsig (BuS Elektronik) 265*00f792e0SHeiko Schocher #define CONFIG_SYS_I2C 266*00f792e0SHeiko Schocher #define CONFIG_SYS_I2C_FSL 267d858c335SJens Scharsig (BuS Elektronik) 268*00f792e0SHeiko Schocher #define CONFIG_SYS_FSL_I2C_OFFSET 0x00000300 269d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_IMMR CONFIG_SYS_MBAR 270d858c335SJens Scharsig (BuS Elektronik) 271*00f792e0SHeiko Schocher #define CONFIG_SYS_FSL_I2C_SPEED 100000 272*00f792e0SHeiko Schocher #define CONFIG_SYS_FSL_I2C_SLAVE 0 273d858c335SJens Scharsig (BuS Elektronik) 274d858c335SJens Scharsig (BuS Elektronik) #ifdef CONFIG_CMD_DATE 275d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_RTC_DS1338 276d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_I2C_RTC_ADDR 0x68 277d858c335SJens Scharsig (BuS Elektronik) #endif 278d858c335SJens Scharsig (BuS Elektronik) 279d858c335SJens Scharsig (BuS Elektronik) /*----------------------------------------------------------------------- 280eb0b43f2SJens Scharsig * VIDEO configuration 281eb0b43f2SJens Scharsig */ 282eb0b43f2SJens Scharsig 283eb0b43f2SJens Scharsig #define CONFIG_VIDEO 284eb0b43f2SJens Scharsig 285eb0b43f2SJens Scharsig #ifdef CONFIG_VIDEO 286eb0b43f2SJens Scharsig #define CONFIG_VIDEO_VCXK 1 287eb0b43f2SJens Scharsig 288eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_DEFAULT_LINEALIGN 2 289eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_DOUBLEBUFFERED 1 290d858c335SJens Scharsig (BuS Elektronik) #define CONFIG_SYS_VCXK_BASE CONFIG_SYS_CS2_BASE 291eb0b43f2SJens Scharsig 292eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_ACKNOWLEDGE_PORT MCFGPTB_GPTPORT 293eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_ACKNOWLEDGE_DDR MCFGPTB_GPTDDR 294eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_ACKNOWLEDGE_PIN 0x0001 295eb0b43f2SJens Scharsig 296eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_ENABLE_PORT MCFGPTB_GPTPORT 297eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_ENABLE_DDR MCFGPTB_GPTDDR 298eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_ENABLE_PIN 0x0002 299eb0b43f2SJens Scharsig 300eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_REQUEST_PORT MCFGPTB_GPTPORT 301eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_REQUEST_DDR MCFGPTB_GPTDDR 302eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_REQUEST_PIN 0x0004 303eb0b43f2SJens Scharsig 304eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_INVERT_PORT MCFGPIO_PORTE 305eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_INVERT_DDR MCFGPIO_DDRE 306eb0b43f2SJens Scharsig #define CONFIG_SYS_VCXK_INVERT_PIN MCFGPIO_PORT2 307eb0b43f2SJens Scharsig 308eb0b43f2SJens Scharsig #endif /* CONFIG_VIDEO */ 309eb0b43f2SJens Scharsig #endif /* _CONFIG_M5282EVB_H */ 310eb0b43f2SJens Scharsig /*---------------------------------------------------------------------*/ 311