1 /* 2 * Copyright (C) 2014 Stefan Roese <sr@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _CONFIG_SYNOLOGY_DS414_H 8 #define _CONFIG_SYNOLOGY_DS414_H 9 10 /* 11 * High Level Configuration Options (easy to change) 12 */ 13 #define CONFIG_DISPLAY_BOARDINFO_LATE 14 15 /* 16 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed 17 * for DDR ECC byte filling in the SPL before loading the main 18 * U-Boot into it. 19 */ 20 #define CONFIG_SYS_TEXT_BASE 0x00800000 21 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 22 23 /* 24 * Commands configuration 25 */ 26 27 /* I2C */ 28 #define CONFIG_SYS_I2C 29 #define CONFIG_SYS_I2C_MVTWSI 30 #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE 31 #define CONFIG_SYS_I2C_SLAVE 0x0 32 #define CONFIG_SYS_I2C_SPEED 100000 33 34 /* SPI NOR flash default params, used by sf commands */ 35 #define CONFIG_SF_DEFAULT_SPEED 1000000 36 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 37 38 /* Environment in SPI NOR flash */ 39 #define CONFIG_ENV_IS_IN_SPI_FLASH 40 #define CONFIG_ENV_OFFSET 0x7E0000 /* RedBoot config partition in DTS */ 41 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 42 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ 43 44 #define CONFIG_PHY_MARVELL /* there is a marvell phy */ 45 #define CONFIG_PHY_ADDR { 0x1, 0x0 } 46 #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII 47 48 #define CONFIG_SYS_ALT_MEMTEST 49 50 /* PCIe support */ 51 #ifndef CONFIG_SPL_BUILD 52 #define CONFIG_CMD_PCI 53 #define CONFIG_CMD_PCI_ENUM 54 #define CONFIG_PCI_MVEBU 55 #define CONFIG_PCI_SCAN_SHOW 56 #endif 57 58 /* USB/EHCI/XHCI configuration */ 59 60 #define CONFIG_DM_USB 61 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 62 63 /* FIXME: broken XHCI support 64 * Below defines should enable support for the two rear USB3 ports. Sadly, this 65 * does not work because: 66 * - xhci-pci seems to not support DM_USB, so with that enabled it is not 67 * found. 68 * - USB init fails, controller does not respond in time */ 69 #if 0 70 #undef CONFIG_DM_USB 71 #define CONFIG_USB_XHCI_PCI 72 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 73 #endif 74 75 #if !defined(CONFIG_USB_XHCI_HCD) 76 #define CONFIG_EHCI_IS_TDI 77 #endif 78 79 /* why is this only defined in mv-common.h if CONFIG_DM is undefined? */ 80 #define CONFIG_SUPPORT_VFAT 81 #define CONFIG_SYS_MVFS 82 83 /* 84 * mv-common.h should be defined after CMD configs since it used them 85 * to enable certain macros 86 */ 87 #include "mv-common.h" 88 89 /* 90 * Memory layout while starting into the bin_hdr via the 91 * BootROM: 92 * 93 * 0x4000.4000 - 0x4003.4000 headers space (192KiB) 94 * 0x4000.4030 bin_hdr start address 95 * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB) 96 * 0x4007.fffc BootROM stack top 97 * 98 * The address space between 0x4007.fffc and 0x400f.fff is not locked in 99 * L2 cache thus cannot be used. 100 */ 101 102 /* SPL */ 103 /* Defines for SPL */ 104 #define CONFIG_SPL_FRAMEWORK 105 #define CONFIG_SPL_TEXT_BASE 0x40004030 106 #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) 107 108 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) 109 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) 110 111 #ifdef CONFIG_SPL_BUILD 112 #define CONFIG_SYS_MALLOC_SIMPLE 113 #endif 114 115 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) 116 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) 117 118 /* SPL related SPI defines */ 119 #define CONFIG_SPL_SPI_LOAD 120 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 121 122 /* DS414 bus width is 32bits */ 123 #define CONFIG_DDR_32BIT 124 125 /* Use random ethernet address if not configured */ 126 #define CONFIG_LIB_RAND 127 #define CONFIG_NET_RANDOM_ETHADDR 128 129 /* Default Environment */ 130 #define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm" 131 #define CONFIG_BOOTARGS "console=ttyS0,115200" 132 #define CONFIG_LOADADDR 0x80000 133 #undef CONFIG_PREBOOT /* override preboot for USB and SPI flash init */ 134 #define CONFIG_PREBOOT "usb start; sf probe" 135 136 #endif /* _CONFIG_SYNOLOGY_DS414_H */ 137