1 /* 2 * Copyright (C) 2014 Stefan Roese <sr@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _CONFIG_SYNOLOGY_DS414_H 8 #define _CONFIG_SYNOLOGY_DS414_H 9 10 /* 11 * High Level Configuration Options (easy to change) 12 */ 13 #define CONFIG_DISPLAY_BOARDINFO_LATE 14 15 /* 16 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed 17 * for DDR ECC byte filling in the SPL before loading the main 18 * U-Boot into it. 19 */ 20 #define CONFIG_SYS_TEXT_BASE 0x00800000 21 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 22 23 /* 24 * Commands configuration 25 */ 26 #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ 27 #define CONFIG_CMD_ENV 28 29 /* I2C */ 30 #define CONFIG_SYS_I2C 31 #define CONFIG_SYS_I2C_MVTWSI 32 #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE 33 #define CONFIG_SYS_I2C_SLAVE 0x0 34 #define CONFIG_SYS_I2C_SPEED 100000 35 36 /* SPI NOR flash default params, used by sf commands */ 37 #define CONFIG_SF_DEFAULT_SPEED 1000000 38 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 39 40 /* Environment in SPI NOR flash */ 41 #define CONFIG_ENV_IS_IN_SPI_FLASH 42 #define CONFIG_ENV_OFFSET 0x7E0000 /* RedBoot config partition in DTS */ 43 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 44 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ 45 46 #define CONFIG_PHY_MARVELL /* there is a marvell phy */ 47 #define CONFIG_PHY_ADDR { 0x1, 0x0 } 48 #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII 49 50 #define CONFIG_SYS_ALT_MEMTEST 51 52 /* PCIe support */ 53 #ifndef CONFIG_SPL_BUILD 54 #define CONFIG_PCI 55 #define CONFIG_CMD_PCI 56 #define CONFIG_CMD_PCI_ENUM 57 #define CONFIG_PCI_MVEBU 58 #define CONFIG_PCI_SCAN_SHOW 59 #endif 60 61 /* USB/EHCI/XHCI configuration */ 62 63 #define CONFIG_DM_USB 64 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 65 66 /* FIXME: broken XHCI support 67 * Below defines should enable support for the two rear USB3 ports. Sadly, this 68 * does not work because: 69 * - xhci-pci seems to not support DM_USB, so with that enabled it is not 70 * found. 71 * - USB init fails, controller does not respond in time */ 72 #if 0 73 #undef CONFIG_DM_USB 74 #define CONFIG_USB_XHCI_PCI 75 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 76 #endif 77 78 #if !defined(CONFIG_USB_XHCI_HCD) 79 #define CONFIG_USB_EHCI 80 #define CONFIG_USB_EHCI_MARVELL 81 #define CONFIG_EHCI_IS_TDI 82 #endif 83 84 /* why is this only defined in mv-common.h if CONFIG_DM is undefined? */ 85 #define CONFIG_USB_STORAGE 86 #define CONFIG_DOS_PARTITION 87 #define CONFIG_ISO_PARTITION 88 #define CONFIG_SUPPORT_VFAT 89 #define CONFIG_SYS_MVFS 90 91 /* 92 * mv-common.h should be defined after CMD configs since it used them 93 * to enable certain macros 94 */ 95 #include "mv-common.h" 96 97 /* 98 * Memory layout while starting into the bin_hdr via the 99 * BootROM: 100 * 101 * 0x4000.4000 - 0x4003.4000 headers space (192KiB) 102 * 0x4000.4030 bin_hdr start address 103 * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB) 104 * 0x4007.fffc BootROM stack top 105 * 106 * The address space between 0x4007.fffc and 0x400f.fff is not locked in 107 * L2 cache thus cannot be used. 108 */ 109 110 /* SPL */ 111 /* Defines for SPL */ 112 #define CONFIG_SPL_FRAMEWORK 113 #define CONFIG_SPL_TEXT_BASE 0x40004030 114 #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) 115 116 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) 117 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) 118 119 #ifdef CONFIG_SPL_BUILD 120 #define CONFIG_SYS_MALLOC_SIMPLE 121 #endif 122 123 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) 124 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) 125 126 #define CONFIG_SPL_LIBCOMMON_SUPPORT 127 #define CONFIG_SPL_LIBGENERIC_SUPPORT 128 #define CONFIG_SPL_SERIAL_SUPPORT 129 #define CONFIG_SPL_I2C_SUPPORT 130 131 /* SPL related SPI defines */ 132 #define CONFIG_SPL_SPI_SUPPORT 133 #define CONFIG_SPL_SPI_FLASH_SUPPORT 134 #define CONFIG_SPL_SPI_LOAD 135 #define CONFIG_SPL_SPI_BUS 0 136 #define CONFIG_SPL_SPI_CS 0 137 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 138 139 /* DS414 bus width is 32bits */ 140 #define CONFIG_DDR_32BIT 141 142 /* Use random ethernet address if not configured */ 143 #define CONFIG_LIB_RAND 144 #define CONFIG_NET_RANDOM_ETHADDR 145 146 /* Default Environment */ 147 #define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm" 148 #define CONFIG_BOOTARGS "console=ttyS0,115200" 149 #define CONFIG_LOADADDR 0x80000 150 #undef CONFIG_PREBOOT /* override preboot for USB and SPI flash init */ 151 #define CONFIG_PREBOOT "usb start; sf probe" 152 153 #endif /* _CONFIG_SYNOLOGY_DS414_H */ 154