1 /* 2 * Copyright (C) 2014 Stefan Roese <sr@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _CONFIG_SYNOLOGY_DS414_H 8 #define _CONFIG_SYNOLOGY_DS414_H 9 10 /* 11 * High Level Configuration Options (easy to change) 12 */ 13 #define CONFIG_DISPLAY_BOARDINFO_LATE 14 15 /* 16 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed 17 * for DDR ECC byte filling in the SPL before loading the main 18 * U-Boot into it. 19 */ 20 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 21 22 /* 23 * Commands configuration 24 */ 25 26 /* I2C */ 27 #define CONFIG_SYS_I2C 28 #define CONFIG_SYS_I2C_MVTWSI 29 #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE 30 #define CONFIG_SYS_I2C_SLAVE 0x0 31 #define CONFIG_SYS_I2C_SPEED 100000 32 33 /* SPI NOR flash default params, used by sf commands */ 34 #define CONFIG_SF_DEFAULT_SPEED 1000000 35 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 36 37 /* Environment in SPI NOR flash */ 38 #define CONFIG_ENV_OFFSET 0x7E0000 /* RedBoot config partition in DTS */ 39 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 40 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ 41 42 #define CONFIG_PHY_MARVELL /* there is a marvell phy */ 43 #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII 44 45 #define CONFIG_SYS_ALT_MEMTEST 46 47 /* PCIe support */ 48 #ifndef CONFIG_SPL_BUILD 49 #define CONFIG_PCI_MVEBU 50 #define CONFIG_PCI_SCAN_SHOW 51 #endif 52 53 /* USB/EHCI/XHCI configuration */ 54 55 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 56 57 /* FIXME: broken XHCI support 58 * Below defines should enable support for the two rear USB3 ports. Sadly, this 59 * does not work because: 60 * - xhci-pci seems to not support DM_USB, so with that enabled it is not 61 * found. 62 * - USB init fails, controller does not respond in time */ 63 64 #if !defined(CONFIG_USB_XHCI_HCD) 65 #define CONFIG_EHCI_IS_TDI 66 #endif 67 68 /* why is this only defined in mv-common.h if CONFIG_DM is undefined? */ 69 #define CONFIG_SYS_MVFS 70 71 /* 72 * mv-common.h should be defined after CMD configs since it used them 73 * to enable certain macros 74 */ 75 #include "mv-common.h" 76 77 /* 78 * Memory layout while starting into the bin_hdr via the 79 * BootROM: 80 * 81 * 0x4000.4000 - 0x4003.4000 headers space (192KiB) 82 * 0x4000.4030 bin_hdr start address 83 * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB) 84 * 0x4007.fffc BootROM stack top 85 * 86 * The address space between 0x4007.fffc and 0x400f.fff is not locked in 87 * L2 cache thus cannot be used. 88 */ 89 90 /* SPL */ 91 /* Defines for SPL */ 92 #define CONFIG_SPL_TEXT_BASE 0x40004030 93 #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) 94 95 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) 96 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) 97 98 #ifdef CONFIG_SPL_BUILD 99 #define CONFIG_SYS_MALLOC_SIMPLE 100 #endif 101 102 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) 103 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) 104 105 /* SPL related SPI defines */ 106 #define CONFIG_SPL_SPI_LOAD 107 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 108 109 /* DS414 bus width is 32bits */ 110 #define CONFIG_DDR_32BIT 111 112 /* Default Environment */ 113 #define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm" 114 #define CONFIG_LOADADDR 0x80000 115 #undef CONFIG_PREBOOT /* override preboot for USB and SPI flash init */ 116 #define CONFIG_PREBOOT "usb start; sf probe" 117 118 #endif /* _CONFIG_SYNOLOGY_DS414_H */ 119