1 /* 2 * Copyright (C) 2014 Stefan Roese <sr@denx.de> 3 * 4 * SPDX-License-Identifier: GPL-2.0+ 5 */ 6 7 #ifndef _CONFIG_SYNOLOGY_DS414_H 8 #define _CONFIG_SYNOLOGY_DS414_H 9 10 /* 11 * High Level Configuration Options (easy to change) 12 */ 13 #define CONFIG_DISPLAY_BOARDINFO_LATE 14 15 /* 16 * TEXT_BASE needs to be below 16MiB, since this area is scrubbed 17 * for DDR ECC byte filling in the SPL before loading the main 18 * U-Boot into it. 19 */ 20 #define CONFIG_SYS_TEXT_BASE 0x00800000 21 #define CONFIG_SYS_TCLK 250000000 /* 250MHz */ 22 23 /* 24 * Commands configuration 25 */ 26 #define CONFIG_SYS_NO_FLASH /* Declare no flash (NOR/SPI) */ 27 #define CONFIG_CMD_DHCP 28 #define CONFIG_CMD_ENV 29 #define CONFIG_CMD_I2C 30 #define CONFIG_CMD_PING 31 #define CONFIG_CMD_SF 32 #define CONFIG_CMD_SPI 33 #define CONFIG_CMD_TFTPPUT 34 #define CONFIG_CMD_TIME 35 #define CONFIG_CMD_USB 36 37 /* I2C */ 38 #define CONFIG_SYS_I2C 39 #define CONFIG_SYS_I2C_MVTWSI 40 #define CONFIG_I2C_MVTWSI_BASE0 MVEBU_TWSI_BASE 41 #define CONFIG_SYS_I2C_SLAVE 0x0 42 #define CONFIG_SYS_I2C_SPEED 100000 43 44 /* SPI NOR flash default params, used by sf commands */ 45 #define CONFIG_SF_DEFAULT_SPEED 1000000 46 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_3 47 48 /* Environment in SPI NOR flash */ 49 #define CONFIG_ENV_IS_IN_SPI_FLASH 50 #define CONFIG_ENV_OFFSET 0x7E0000 /* RedBoot config partition in DTS */ 51 #define CONFIG_ENV_SIZE (64 << 10) /* 64KiB */ 52 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64KiB sectors */ 53 54 #define CONFIG_PHY_MARVELL /* there is a marvell phy */ 55 #define CONFIG_PHY_ADDR { 0x1, 0x0 } 56 #define CONFIG_SYS_NETA_INTERFACE_TYPE PHY_INTERFACE_MODE_RGMII 57 58 #define CONFIG_SYS_ALT_MEMTEST 59 60 /* PCIe support */ 61 #ifndef CONFIG_SPL_BUILD 62 #define CONFIG_PCI 63 #define CONFIG_CMD_PCI 64 #define CONFIG_CMD_PCI_ENUM 65 #define CONFIG_PCI_MVEBU 66 #define CONFIG_PCI_SCAN_SHOW 67 #endif 68 69 /* USB/EHCI/XHCI configuration */ 70 71 #define CONFIG_DM_USB 72 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2 73 74 /* FIXME: broken XHCI support 75 * Below defines should enable support for the two rear USB3 ports. Sadly, this 76 * does not work because: 77 * - xhci-pci seems to not support DM_USB, so with that enabled it is not 78 * found. 79 * - USB init fails, controller does not respond in time */ 80 #if 0 81 #undef CONFIG_DM_USB 82 #define CONFIG_USB_XHCI 83 #define CONFIG_USB_XHCI_PCI 84 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 85 #endif 86 87 #if !defined(CONFIG_USB_XHCI) 88 #define CONFIG_USB_EHCI 89 #define CONFIG_USB_EHCI_MARVELL 90 #define CONFIG_EHCI_IS_TDI 91 #endif 92 93 /* why is this only defined in mv-common.h if CONFIG_DM is undefined? */ 94 #define CONFIG_USB_STORAGE 95 #define CONFIG_DOS_PARTITION 96 #define CONFIG_ISO_PARTITION 97 #define CONFIG_SUPPORT_VFAT 98 #define CONFIG_SYS_MVFS 99 100 /* 101 * mv-common.h should be defined after CMD configs since it used them 102 * to enable certain macros 103 */ 104 #include "mv-common.h" 105 106 /* 107 * Memory layout while starting into the bin_hdr via the 108 * BootROM: 109 * 110 * 0x4000.4000 - 0x4003.4000 headers space (192KiB) 111 * 0x4000.4030 bin_hdr start address 112 * 0x4003.4000 - 0x4004.7c00 BootROM memory allocations (15KiB) 113 * 0x4007.fffc BootROM stack top 114 * 115 * The address space between 0x4007.fffc and 0x400f.fff is not locked in 116 * L2 cache thus cannot be used. 117 */ 118 119 /* SPL */ 120 /* Defines for SPL */ 121 #define CONFIG_SPL_FRAMEWORK 122 #define CONFIG_SPL_TEXT_BASE 0x40004030 123 #define CONFIG_SPL_MAX_SIZE ((128 << 10) - 0x4030) 124 125 #define CONFIG_SPL_BSS_START_ADDR (0x40000000 + (128 << 10)) 126 #define CONFIG_SPL_BSS_MAX_SIZE (16 << 10) 127 128 #ifdef CONFIG_SPL_BUILD 129 #define CONFIG_SYS_MALLOC_SIMPLE 130 #endif 131 132 #define CONFIG_SPL_STACK (0x40000000 + ((192 - 16) << 10)) 133 #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) 134 135 #define CONFIG_SPL_LIBCOMMON_SUPPORT 136 #define CONFIG_SPL_LIBGENERIC_SUPPORT 137 #define CONFIG_SPL_SERIAL_SUPPORT 138 #define CONFIG_SPL_I2C_SUPPORT 139 140 /* SPL related SPI defines */ 141 #define CONFIG_SPL_SPI_SUPPORT 142 #define CONFIG_SPL_SPI_FLASH_SUPPORT 143 #define CONFIG_SPL_SPI_LOAD 144 #define CONFIG_SPL_SPI_BUS 0 145 #define CONFIG_SPL_SPI_CS 0 146 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x24000 147 148 /* DS414 bus width is 32bits */ 149 #define CONFIG_DDR_32BIT 150 151 /* Use random ethernet address if not configured */ 152 #define CONFIG_LIB_RAND 153 #define CONFIG_NET_RANDOM_ETHADDR 154 155 /* Default Environment */ 156 #define CONFIG_BOOTCOMMAND "sf read ${loadaddr} 0xd0000 0x700000; bootm" 157 #define CONFIG_BOOTARGS "console=ttyS0,115200" 158 #define CONFIG_LOADADDR 0x80000 159 #undef CONFIG_PREBOOT /* override preboot for USB and SPI flash init */ 160 #define CONFIG_PREBOOT "usb start; sf probe" 161 162 #endif /* _CONFIG_SYNOLOGY_DS414_H */ 163