1 /* 2 * (C) Copyright 2013 3 * Texas Instruments Incorporated. 4 * Lokesh Vutla <lokeshvutla@ti.com> 5 * 6 * Configuration settings for the TI DRA7XX board. 7 * See ti_omap5_common.h for omap5 common settings. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_DRA7XX_EVM_H 13 #define __CONFIG_DRA7XX_EVM_H 14 15 #include <environment/ti/dfu.h> 16 17 #ifdef CONFIG_SPL_BUILD 18 #define CONFIG_IODELAY_RECALIBRATION 19 #endif 20 21 #define CONFIG_VERY_BIG_RAM 22 #define CONFIG_NR_DRAM_BANKS 2 23 #define CONFIG_MAX_MEM_MAPPED 0x80000000 24 25 #ifndef CONFIG_QSPI_BOOT 26 /* MMC ENV related defines */ 27 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ 28 #define CONFIG_ENV_SIZE (128 << 10) 29 #define CONFIG_ENV_OFFSET 0x260000 30 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 31 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 32 #endif 33 34 #if (CONFIG_CONS_INDEX == 1) 35 #define CONSOLEDEV "ttyO0" 36 #elif (CONFIG_CONS_INDEX == 3) 37 #define CONSOLEDEV "ttyO2" 38 #endif 39 #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ 40 #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ 41 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ 42 43 #define CONFIG_ENV_EEPROM_IS_ON_I2C 44 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 45 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 46 47 #define CONFIG_SYS_OMAP_ABE_SYSCK 48 49 #ifndef CONFIG_SPL_BUILD 50 /* Define the default GPT table for eMMC */ 51 #define PARTS_DEFAULT \ 52 /* Linux partitions */ \ 53 "uuid_disk=${uuid_gpt_disk};" \ 54 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ 55 /* Android partitions */ \ 56 "partitions_android=" \ 57 "uuid_disk=${uuid_gpt_disk};" \ 58 "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \ 59 "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \ 60 "name=environment,size=128K,uuid=${uuid_gpt_environment};" \ 61 "name=misc,size=128K,uuid=${uuid_gpt_misc};" \ 62 "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \ 63 "name=efs,size=16M,uuid=${uuid_gpt_efs};" \ 64 "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \ 65 "name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \ 66 "name=boot,size=10M,uuid=${uuid_gpt_boot};" \ 67 "name=system,size=768M,uuid=${uuid_gpt_system};" \ 68 "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ 69 "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \ 70 "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \ 71 "name=userdata,size=-,uuid=${uuid_gpt_userdata}" 72 73 #define DFUARGS \ 74 "dfu_bufsiz=0x10000\0" \ 75 DFU_ALT_INFO_MMC \ 76 DFU_ALT_INFO_EMMC \ 77 DFU_ALT_INFO_RAM \ 78 DFU_ALT_INFO_QSPI 79 #else 80 /* Discard fastboot in SPL build, to spare some space */ 81 #undef CONFIG_FASTBOOT 82 #undef CONFIG_USB_FUNCTION_FASTBOOT 83 #undef CONFIG_CMD_FASTBOOT 84 #undef CONFIG_ANDROID_BOOT_IMAGE 85 #undef CONFIG_FASTBOOT_BUF_ADDR 86 #undef CONFIG_FASTBOOT_BUF_SIZE 87 #undef CONFIG_FASTBOOT_FLASH 88 #endif 89 90 #ifdef CONFIG_SPL_BUILD 91 #undef CONFIG_CMD_BOOTD 92 #ifdef CONFIG_SPL_DFU_SUPPORT 93 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000 94 #define DFUARGS \ 95 "dfu_bufsiz=0x10000\0" \ 96 DFU_ALT_INFO_RAM 97 #endif 98 #endif 99 100 #include <configs/ti_omap5_common.h> 101 102 /* Enhance our eMMC support / experience. */ 103 #define CONFIG_RANDOM_UUID 104 #define CONFIG_HSMMC2_8BIT 105 106 /* CPSW Ethernet */ 107 #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ 108 #define CONFIG_BOOTP_DNS2 109 #define CONFIG_BOOTP_SEND_HOSTNAME 110 #define CONFIG_BOOTP_GATEWAY 111 #define CONFIG_BOOTP_SUBNETMASK 112 #define CONFIG_NET_RETRY_COUNT 10 113 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ 114 #define CONFIG_MII /* Required in net/eth.c */ 115 #define CONFIG_PHY_GIGE /* per-board part of CPSW */ 116 #define CONFIG_PHYLIB 117 #define CONFIG_PHY_TI 118 119 /* SPI */ 120 #undef CONFIG_OMAP3_SPI 121 #define CONFIG_TI_SPI_MMAP 122 #define CONFIG_SF_DEFAULT_SPEED 76800000 123 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 124 #define CONFIG_QSPI_QUAD_SUPPORT 125 126 /* 127 * Default to using SPI for environment, etc. 128 * 0x000000 - 0x040000 : QSPI.SPL (256KiB) 129 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) 130 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) 131 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) 132 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) 133 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) 134 * 0x9E0000 - 0x2000000 : USERLAND 135 */ 136 #define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000 137 #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 138 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 139 #if defined(CONFIG_QSPI_BOOT) 140 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 141 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 142 #define CONFIG_ENV_SIZE (64 << 10) 143 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ 144 #define CONFIG_ENV_OFFSET 0x1C0000 145 #define CONFIG_ENV_OFFSET_REDUND 0x1D0000 146 #endif 147 148 /* SPI SPL */ 149 #define CONFIG_TI_EDMA3 150 #define CONFIG_SPL_SPI_LOAD 151 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 152 153 #define CONFIG_SUPPORT_EMMC_BOOT 154 155 /* USB xHCI HOST */ 156 #define CONFIG_USB_XHCI_OMAP 157 158 #define CONFIG_OMAP_USB_PHY 159 #define CONFIG_OMAP_USB2PHY2_HOST 160 161 /* SATA */ 162 #define CONFIG_LIBATA 163 #define CONFIG_SCSI_AHCI 164 #define CONFIG_SCSI_AHCI_PLAT 165 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 166 #define CONFIG_SYS_SCSI_MAX_LUN 1 167 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 168 CONFIG_SYS_SCSI_MAX_LUN) 169 170 /* NAND support */ 171 #ifdef CONFIG_NAND 172 /* NAND: device related configs */ 173 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 174 #define CONFIG_SYS_NAND_OOBSIZE 64 175 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 176 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 177 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 178 CONFIG_SYS_NAND_PAGE_SIZE) 179 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 180 /* NAND: driver related configs */ 181 #define CONFIG_NAND_OMAP_GPMC 182 #define CONFIG_NAND_OMAP_ELM 183 #define CONFIG_SYS_NAND_ONFI_DETECTION 184 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW 185 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 186 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 187 10, 11, 12, 13, 14, 15, 16, 17, \ 188 18, 19, 20, 21, 22, 23, 24, 25, \ 189 26, 27, 28, 29, 30, 31, 32, 33, \ 190 34, 35, 36, 37, 38, 39, 40, 41, \ 191 42, 43, 44, 45, 46, 47, 48, 49, \ 192 50, 51, 52, 53, 54, 55, 56, 57, } 193 #define CONFIG_SYS_NAND_ECCSIZE 512 194 #define CONFIG_SYS_NAND_ECCBYTES 14 195 #define MTDIDS_DEFAULT "nand0=nand.0" 196 #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \ 197 "128k(NAND.SPL)," \ 198 "128k(NAND.SPL.backup1)," \ 199 "128k(NAND.SPL.backup2)," \ 200 "128k(NAND.SPL.backup3)," \ 201 "256k(NAND.u-boot-spl-os)," \ 202 "1m(NAND.u-boot)," \ 203 "128k(NAND.u-boot-env)," \ 204 "128k(NAND.u-boot-env.backup1)," \ 205 "8m(NAND.kernel)," \ 206 "-(NAND.file-system)" 207 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 208 /* NAND: SPL related configs */ 209 #ifdef CONFIG_SPL_NAND_SUPPORT 210 #define CONFIG_SPL_NAND_AM33XX_BCH 211 #endif 212 /* NAND: SPL falcon mode configs */ 213 #ifdef CONFIG_SPL_OS_BOOT 214 #define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/ 215 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ 216 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 217 #endif 218 #endif /* !CONFIG_NAND */ 219 220 /* Parallel NOR Support */ 221 #if defined(CONFIG_NOR) 222 /* NOR: device related configs */ 223 #define CONFIG_SYS_MAX_FLASH_SECT 512 224 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 225 #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ 226 /* #define CONFIG_INIT_IGNORE_ERROR */ 227 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 228 #define CONFIG_SYS_FLASH_PROTECTION 229 #define CONFIG_SYS_FLASH_CFI 230 #define CONFIG_FLASH_CFI_DRIVER 231 #define CONFIG_FLASH_CFI_MTD 232 #define CONFIG_SYS_MAX_FLASH_BANKS 1 233 #define CONFIG_SYS_FLASH_BASE (0x08000000) 234 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 235 /* Reduce SPL size by removing unlikey targets */ 236 #ifdef CONFIG_NOR_BOOT 237 #define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */ 238 #define MTDIDS_DEFAULT "nor0=physmap-flash.0" 239 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \ 240 "128k(NOR.SPL)," \ 241 "128k(NOR.SPL.backup1)," \ 242 "128k(NOR.SPL.backup2)," \ 243 "128k(NOR.SPL.backup3)," \ 244 "256k(NOR.u-boot-spl-os)," \ 245 "1m(NOR.u-boot)," \ 246 "128k(NOR.u-boot-env)," \ 247 "128k(NOR.u-boot-env.backup1)," \ 248 "8m(NOR.kernel)," \ 249 "-(NOR.rootfs)" 250 #define CONFIG_ENV_OFFSET 0x001c0000 251 #define CONFIG_ENV_OFFSET_REDUND 0x001e0000 252 #endif 253 #endif /* NOR support */ 254 255 #endif /* __CONFIG_DRA7XX_EVM_H */ 256