1 /* 2 * (C) Copyright 2013 3 * Texas Instruments Incorporated. 4 * Lokesh Vutla <lokeshvutla@ti.com> 5 * 6 * Configuration settings for the TI DRA7XX board. 7 * See ti_omap5_common.h for omap5 common settings. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_DRA7XX_EVM_H 13 #define __CONFIG_DRA7XX_EVM_H 14 15 #define CONFIG_DRA7XX 16 #define CONFIG_BOARD_EARLY_INIT_F 17 18 #ifndef CONFIG_QSPI_BOOT 19 /* MMC ENV related defines */ 20 #define CONFIG_ENV_IS_IN_MMC 21 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ 22 #define CONFIG_ENV_SIZE (128 << 10) 23 #define CONFIG_ENV_OFFSET 0xE0000 24 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 25 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 26 #endif 27 #define CONFIG_CMD_SAVEENV 28 29 #if (CONFIG_CONS_INDEX == 1) 30 #define CONSOLEDEV "ttyO0" 31 #elif (CONFIG_CONS_INDEX == 3) 32 #define CONSOLEDEV "ttyO2" 33 #endif 34 #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ 35 #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ 36 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ 37 #define CONFIG_BAUDRATE 115200 38 39 #define CONFIG_SYS_OMAP_ABE_SYSCK 40 41 /* Define the default GPT table for eMMC */ 42 #define PARTS_DEFAULT \ 43 "uuid_disk=${uuid_gpt_disk};" \ 44 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}" 45 46 #define DFU_ALT_INFO_MMC \ 47 "dfu_alt_info_mmc=" \ 48 "boot part 0 1;" \ 49 "rootfs part 0 2;" \ 50 "MLO fat 0 1;" \ 51 "MLO.raw raw 0x100 0x100;" \ 52 "u-boot.img.raw raw 0x300 0x400;" \ 53 "spl-os-args.raw raw 0x80 0x80;" \ 54 "spl-os-image.raw raw 0x900 0x2000;" \ 55 "spl-os-args fat 0 1;" \ 56 "spl-os-image fat 0 1;" \ 57 "u-boot.img fat 0 1;" \ 58 "uEnv.txt fat 0 1\0" 59 60 #define DFU_ALT_INFO_EMMC \ 61 "dfu_alt_info_emmc=" \ 62 "rawemmc raw 0 3751936;" \ 63 "boot part 1 1;" \ 64 "rootfs part 1 2;" \ 65 "MLO fat 1 1;" \ 66 "MLO.raw raw 0x100 0x100;" \ 67 "u-boot.img.raw raw 0x300 0x400;" \ 68 "spl-os-args.raw raw 0x80 0x80;" \ 69 "spl-os-image.raw raw 0x900 0x2000;" \ 70 "spl-os-args fat 1 1;" \ 71 "spl-os-image fat 1 1;" \ 72 "u-boot.img fat 1 1;" \ 73 "uEnv.txt fat 1 1\0" 74 75 #define DFU_ALT_INFO_RAM \ 76 "dfu_alt_info_ram=" \ 77 "kernel ram 0x80200000 0x4000000;" \ 78 "fdt ram 0x80f80000 0x80000;" \ 79 "ramdisk ram 0x81000000 0x4000000\0" 80 81 #define DFUARGS \ 82 "dfu_bufsiz=0x10000\0" \ 83 DFU_ALT_INFO_MMC \ 84 DFU_ALT_INFO_EMMC \ 85 DFU_ALT_INFO_RAM 86 87 #include <configs/ti_omap5_common.h> 88 89 /* Enhance our eMMC support / experience. */ 90 #define CONFIG_CMD_GPT 91 #define CONFIG_EFI_PARTITION 92 #define CONFIG_HSMMC2_8BIT 93 94 /* CPSW Ethernet */ 95 #define CONFIG_CMD_NET /* 'bootp' and 'tftp' */ 96 #define CONFIG_CMD_DHCP 97 #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ 98 #define CONFIG_BOOTP_DNS2 99 #define CONFIG_BOOTP_SEND_HOSTNAME 100 #define CONFIG_BOOTP_GATEWAY 101 #define CONFIG_BOOTP_SUBNETMASK 102 #define CONFIG_NET_RETRY_COUNT 10 103 #define CONFIG_CMD_PING 104 #define CONFIG_CMD_MII 105 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ 106 #define CONFIG_MII /* Required in net/eth.c */ 107 #define CONFIG_PHY_GIGE /* per-board part of CPSW */ 108 #define CONFIG_PHYLIB 109 110 /* SPI */ 111 #undef CONFIG_OMAP3_SPI 112 #define CONFIG_TI_QSPI 113 #define CONFIG_SPI_FLASH 114 #define CONFIG_SPI_FLASH_SPANSION 115 #define CONFIG_CMD_SF 116 #define CONFIG_CMD_SPI 117 #define CONFIG_SPI_FLASH_BAR 118 #define CONFIG_TI_SPI_MMAP 119 #define CONFIG_SF_DEFAULT_SPEED 48000000 120 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 121 #define CONFIG_QSPI_QUAD_SUPPORT 122 123 /* 124 * Default to using SPI for environment, etc. 125 * 0x000000 - 0x010000 : QSPI.SPL (64KiB) 126 * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB) 127 * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB) 128 * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB) 129 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) 130 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) 131 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) 132 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) 133 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) 134 * 0x9E0000 - 0x2000000 : USERLAND 135 */ 136 #define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000 137 #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 138 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 139 #if defined(CONFIG_QSPI_BOOT) 140 /* In SPL, use the environment and discard MMC support for space. */ 141 #ifdef CONFIG_SPL_BUILD 142 #undef CONFIG_SPL_MMC_SUPPORT 143 #undef CONFIG_SPL_MAX_SIZE 144 #define CONFIG_SPL_MAX_SIZE (64 << 10) /* 64 KiB */ 145 #endif 146 #define CONFIG_SPL_ENV_SUPPORT 147 #define CONFIG_ENV_IS_IN_SPI_FLASH 148 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 149 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 150 #define CONFIG_ENV_SIZE (64 << 10) 151 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ 152 #define CONFIG_ENV_OFFSET 0x1C0000 153 #define CONFIG_ENV_OFFSET_REDUND 0x1D0000 154 #endif 155 156 /* SPI SPL */ 157 #define CONFIG_SPL_SPI_SUPPORT 158 #define CONFIG_SPL_SPI_LOAD 159 #define CONFIG_SPL_SPI_FLASH_SUPPORT 160 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 161 162 #define CONFIG_SUPPORT_EMMC_BOOT 163 164 /* USB xHCI HOST */ 165 #define CONFIG_CMD_USB 166 #define CONFIG_USB_HOST 167 #define CONFIG_USB_XHCI 168 #define CONFIG_USB_XHCI_OMAP 169 #define CONFIG_USB_STORAGE 170 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 171 172 #define CONFIG_OMAP_USB_PHY 173 #define CONFIG_OMAP_USB2PHY2_HOST 174 175 /* USB GADGET */ 176 #define CONFIG_USB_DWC3_PHY_OMAP 177 #define CONFIG_USB_DWC3_OMAP 178 #define CONFIG_USB_DWC3 179 #define CONFIG_USB_DWC3_GADGET 180 181 #define CONFIG_USB_GADGET 182 #define CONFIG_USBDOWNLOAD_GADGET 183 #define CONFIG_USB_GADGET_VBUS_DRAW 2 184 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" 185 #define CONFIG_G_DNL_VENDOR_NUM 0x0403 186 #define CONFIG_G_DNL_PRODUCT_NUM 0xBD00 187 #define CONFIG_USB_GADGET_DUALSPEED 188 189 /* USB Device Firmware Update support */ 190 #define CONFIG_DFU_FUNCTION 191 #define CONFIG_DFU_RAM 192 #define CONFIG_CMD_DFU 193 194 #define CONFIG_DFU_MMC 195 #define CONFIG_DFU_RAM 196 197 /* SATA */ 198 #define CONFIG_BOARD_LATE_INIT 199 #define CONFIG_CMD_SCSI 200 #define CONFIG_LIBATA 201 #define CONFIG_SCSI_AHCI 202 #define CONFIG_SCSI_AHCI_PLAT 203 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 204 #define CONFIG_SYS_SCSI_MAX_LUN 1 205 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 206 CONFIG_SYS_SCSI_MAX_LUN) 207 208 /* NAND support */ 209 #ifdef CONFIG_NAND 210 /* NAND: device related configs */ 211 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 212 #define CONFIG_SYS_NAND_OOBSIZE 64 213 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 214 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 215 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 216 CONFIG_SYS_NAND_PAGE_SIZE) 217 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 218 /* NAND: driver related configs */ 219 #define CONFIG_NAND_OMAP_GPMC 220 #define CONFIG_NAND_OMAP_ELM 221 #define CONFIG_SYS_NAND_ONFI_DETECTION 222 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW 223 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 224 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 225 10, 11, 12, 13, 14, 15, 16, 17, \ 226 18, 19, 20, 21, 22, 23, 24, 25, \ 227 26, 27, 28, 29, 30, 31, 32, 33, \ 228 34, 35, 36, 37, 38, 39, 40, 41, \ 229 42, 43, 44, 45, 46, 47, 48, 49, \ 230 50, 51, 52, 53, 54, 55, 56, 57, } 231 #define CONFIG_SYS_NAND_ECCSIZE 512 232 #define CONFIG_SYS_NAND_ECCBYTES 14 233 #define MTDIDS_DEFAULT "nand0=nand.0" 234 #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \ 235 "128k(NAND.SPL)," \ 236 "128k(NAND.SPL.backup1)," \ 237 "128k(NAND.SPL.backup2)," \ 238 "128k(NAND.SPL.backup3)," \ 239 "256k(NAND.u-boot-spl-os)," \ 240 "1m(NAND.u-boot)," \ 241 "128k(NAND.u-boot-env)," \ 242 "128k(NAND.u-boot-env.backup1)," \ 243 "8m(NAND.kernel)," \ 244 "-(NAND.rootfs)" 245 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 246 /* NAND: SPL related configs */ 247 #ifdef CONFIG_SPL_NAND_SUPPORT 248 #define CONFIG_SPL_NAND_AM33XX_BCH 249 #endif 250 /* NAND: SPL falcon mode configs */ 251 #ifdef CONFIG_SPL_OS_BOOT 252 #define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/ 253 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ 254 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 255 #endif 256 #endif /* !CONFIG_NAND */ 257 258 /* Parallel NOR Support */ 259 #if defined(CONFIG_NOR) 260 /* NOR: device related configs */ 261 #define CONFIG_SYS_MAX_FLASH_SECT 512 262 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 263 #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ 264 /* #define CONFIG_INIT_IGNORE_ERROR */ 265 #undef CONFIG_SYS_NO_FLASH 266 #define CONFIG_CMD_FLASH 267 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 268 #define CONFIG_SYS_FLASH_PROTECTION 269 #define CONFIG_SYS_FLASH_CFI 270 #define CONFIG_FLASH_CFI_DRIVER 271 #define CONFIG_FLASH_CFI_MTD 272 #define CONFIG_SYS_MAX_FLASH_BANKS 1 273 #define CONFIG_SYS_FLASH_BASE (0x08000000) 274 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 275 /* Reduce SPL size by removing unlikey targets */ 276 #ifdef CONFIG_NOR_BOOT 277 #define CONFIG_ENV_IS_IN_FLASH 278 #define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */ 279 #define MTDIDS_DEFAULT "nor0=physmap-flash.0" 280 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \ 281 "128k(NOR.SPL)," \ 282 "128k(NOR.SPL.backup1)," \ 283 "128k(NOR.SPL.backup2)," \ 284 "128k(NOR.SPL.backup3)," \ 285 "256k(NOR.u-boot-spl-os)," \ 286 "1m(NOR.u-boot)," \ 287 "128k(NOR.u-boot-env)," \ 288 "128k(NOR.u-boot-env.backup1)," \ 289 "8m(NOR.kernel)," \ 290 "-(NOR.rootfs)" 291 #define CONFIG_ENV_OFFSET 0x001c0000 292 #define CONFIG_ENV_OFFSET_REDUND 0x001e0000 293 #endif 294 #endif /* NOR support */ 295 296 #endif /* __CONFIG_DRA7XX_EVM_H */ 297