1 /* 2 * (C) Copyright 2013 3 * Texas Instruments Incorporated. 4 * Lokesh Vutla <lokeshvutla@ti.com> 5 * 6 * Configuration settings for the TI DRA7XX board. 7 * See ti_omap5_common.h for omap5 common settings. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_DRA7XX_EVM_H 13 #define __CONFIG_DRA7XX_EVM_H 14 15 #include <environment/ti/dfu.h> 16 17 #define CONFIG_IODELAY_RECALIBRATION 18 19 #define CONFIG_VERY_BIG_RAM 20 #define CONFIG_NR_DRAM_BANKS 2 21 #define CONFIG_MAX_MEM_MAPPED 0x80000000 22 23 #ifndef CONFIG_QSPI_BOOT 24 /* MMC ENV related defines */ 25 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ 26 #define CONFIG_ENV_SIZE (128 << 10) 27 #define CONFIG_ENV_OFFSET 0x260000 28 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 29 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 30 #endif 31 32 #if (CONFIG_CONS_INDEX == 1) 33 #define CONSOLEDEV "ttyO0" 34 #elif (CONFIG_CONS_INDEX == 3) 35 #define CONSOLEDEV "ttyO2" 36 #endif 37 #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ 38 #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ 39 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ 40 41 #define CONFIG_ENV_EEPROM_IS_ON_I2C 42 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50 /* Main EEPROM */ 43 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 44 45 #define CONFIG_SYS_OMAP_ABE_SYSCK 46 47 #ifndef CONFIG_SPL_BUILD 48 /* Define the default GPT table for eMMC */ 49 #define PARTS_DEFAULT \ 50 /* Linux partitions */ \ 51 "uuid_disk=${uuid_gpt_disk};" \ 52 "name=bootloader,start=384K,size=1792K,uuid=${uuid_gpt_bootloader};" \ 53 "name=rootfs,start=2688K,size=-,uuid=${uuid_gpt_rootfs}\0" \ 54 /* Android partitions */ \ 55 "partitions_android=" \ 56 "uuid_disk=${uuid_gpt_disk};" \ 57 "name=xloader,start=128K,size=256K,uuid=${uuid_gpt_xloader};" \ 58 "name=bootloader,size=1792K,uuid=${uuid_gpt_bootloader};" \ 59 "name=environment,size=128K,uuid=${uuid_gpt_environment};" \ 60 "name=misc,size=128K,uuid=${uuid_gpt_misc};" \ 61 "name=reserved,size=256K,uuid=${uuid_gpt_reserved};" \ 62 "name=efs,size=16M,uuid=${uuid_gpt_efs};" \ 63 "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \ 64 "name=recovery,size=40M,uuid=${uuid_gpt_recovery};" \ 65 "name=boot,size=10M,uuid=${uuid_gpt_boot};" \ 66 "name=system,size=768M,uuid=${uuid_gpt_system};" \ 67 "name=vendor,size=256M,uuid=${uuid_gpt_vendor};" \ 68 "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ 69 "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \ 70 "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \ 71 "name=userdata,size=-,uuid=${uuid_gpt_userdata}" 72 73 #define DFUARGS \ 74 "dfu_bufsiz=0x10000\0" \ 75 DFU_ALT_INFO_MMC \ 76 DFU_ALT_INFO_EMMC \ 77 DFU_ALT_INFO_RAM \ 78 DFU_ALT_INFO_QSPI 79 #endif 80 81 #ifdef CONFIG_SPL_BUILD 82 #undef CONFIG_CMD_BOOTD 83 #ifdef CONFIG_SPL_DFU_SUPPORT 84 #define CONFIG_SPL_LOAD_FIT_ADDRESS 0x80200000 85 #define DFUARGS \ 86 "dfu_bufsiz=0x10000\0" \ 87 DFU_ALT_INFO_RAM 88 #endif 89 #endif 90 91 #include <configs/ti_omap5_common.h> 92 93 /* Enhance our eMMC support / experience. */ 94 #define CONFIG_HSMMC2_8BIT 95 96 /* CPSW Ethernet */ 97 #define CONFIG_BOOTP_DNS2 98 #define CONFIG_BOOTP_SEND_HOSTNAME 99 #define CONFIG_NET_RETRY_COUNT 10 100 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ 101 #define CONFIG_MII /* Required in net/eth.c */ 102 #define CONFIG_PHY_TI 103 104 /* SPI */ 105 #define CONFIG_TI_SPI_MMAP 106 #define CONFIG_SF_DEFAULT_SPEED 76800000 107 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 108 #define CONFIG_QSPI_QUAD_SUPPORT 109 110 /* 111 * Default to using SPI for environment, etc. 112 * 0x000000 - 0x040000 : QSPI.SPL (256KiB) 113 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) 114 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) 115 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) 116 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) 117 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) 118 * 0x9E0000 - 0x2000000 : USERLAND 119 */ 120 #define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000 121 #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 122 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 123 #if defined(CONFIG_QSPI_BOOT) 124 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 125 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 126 #define CONFIG_ENV_SIZE (64 << 10) 127 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ 128 #define CONFIG_ENV_OFFSET 0x1C0000 129 #define CONFIG_ENV_OFFSET_REDUND 0x1D0000 130 #endif 131 132 /* SPI SPL */ 133 #define CONFIG_TI_EDMA3 134 #define CONFIG_SPL_SPI_LOAD 135 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 136 137 #define CONFIG_SUPPORT_EMMC_BOOT 138 139 /* USB xHCI HOST */ 140 #define CONFIG_USB_XHCI_OMAP 141 142 #define CONFIG_OMAP_USB2PHY2_HOST 143 144 /* SATA */ 145 #define CONFIG_SCSI_AHCI_PLAT 146 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 147 #define CONFIG_SYS_SCSI_MAX_LUN 1 148 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 149 CONFIG_SYS_SCSI_MAX_LUN) 150 151 /* NAND support */ 152 #ifdef CONFIG_NAND 153 /* NAND: device related configs */ 154 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 155 #define CONFIG_SYS_NAND_OOBSIZE 64 156 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 157 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 158 CONFIG_SYS_NAND_PAGE_SIZE) 159 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 160 /* NAND: driver related configs */ 161 #define CONFIG_SYS_NAND_ONFI_DETECTION 162 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW 163 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 164 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 165 10, 11, 12, 13, 14, 15, 16, 17, \ 166 18, 19, 20, 21, 22, 23, 24, 25, \ 167 26, 27, 28, 29, 30, 31, 32, 33, \ 168 34, 35, 36, 37, 38, 39, 40, 41, \ 169 42, 43, 44, 45, 46, 47, 48, 49, \ 170 50, 51, 52, 53, 54, 55, 56, 57, } 171 #define CONFIG_SYS_NAND_ECCSIZE 512 172 #define CONFIG_SYS_NAND_ECCBYTES 14 173 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 174 /* NAND: SPL related configs */ 175 /* NAND: SPL falcon mode configs */ 176 #ifdef CONFIG_SPL_OS_BOOT 177 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ 178 #endif 179 #endif /* !CONFIG_NAND */ 180 181 /* Parallel NOR Support */ 182 #if defined(CONFIG_NOR) 183 /* NOR: device related configs */ 184 #define CONFIG_SYS_MAX_FLASH_SECT 512 185 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 186 #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ 187 /* #define CONFIG_INIT_IGNORE_ERROR */ 188 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 189 #define CONFIG_SYS_FLASH_PROTECTION 190 #define CONFIG_SYS_FLASH_CFI 191 #define CONFIG_FLASH_CFI_DRIVER 192 #define CONFIG_FLASH_CFI_MTD 193 #define CONFIG_SYS_MAX_FLASH_BANKS 1 194 #define CONFIG_SYS_FLASH_BASE (0x08000000) 195 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 196 /* Reduce SPL size by removing unlikey targets */ 197 #ifdef CONFIG_NOR_BOOT 198 #define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */ 199 #define CONFIG_ENV_OFFSET 0x001c0000 200 #define CONFIG_ENV_OFFSET_REDUND 0x001e0000 201 #endif 202 #endif /* NOR support */ 203 204 #endif /* __CONFIG_DRA7XX_EVM_H */ 205