xref: /openbmc/u-boot/include/configs/dra7xx_evm.h (revision ac45bb16)
1 /*
2  * (C) Copyright 2013
3  * Texas Instruments Incorporated.
4  * Lokesh Vutla	  <lokeshvutla@ti.com>
5  *
6  * Configuration settings for the TI DRA7XX board.
7  * See omap5_common.h for omap5 common settings.
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #ifndef __CONFIG_DRA7XX_EVM_H
13 #define __CONFIG_DRA7XX_EVM_H
14 
15 #define CONFIG_DRA7XX
16 
17 /* MMC ENV related defines */
18 #define CONFIG_ENV_IS_IN_MMC
19 #define CONFIG_SYS_MMC_ENV_DEV		1	/* SLOT2: eMMC(1) */
20 #define CONFIG_ENV_OFFSET		0xE0000
21 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
22 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
23 #define CONFIG_CMD_SAVEENV
24 
25 #if (CONFIG_CONS_INDEX == 1)
26 #define CONSOLEDEV			"ttyO0"
27 #elif (CONFIG_CONS_INDEX == 3)
28 #define CONSOLEDEV			"ttyO2"
29 #endif
30 #define CONFIG_SYS_NS16550_COM1		UART1_BASE	/* Base EVM has UART0 */
31 #define CONFIG_SYS_NS16550_COM2		UART2_BASE	/* UART2 */
32 #define CONFIG_SYS_NS16550_COM3		UART3_BASE	/* UART3 */
33 #define CONFIG_BAUDRATE			115200
34 
35 #define CONFIG_SYS_OMAP_ABE_SYSCK
36 
37 #include <configs/omap5_common.h>
38 
39 /* CPSW Ethernet */
40 #define CONFIG_CMD_NET			/* 'bootp' and 'tftp' */
41 #define CONFIG_CMD_DHCP
42 #define CONFIG_BOOTP_DNS		/* Configurable parts of CMD_DHCP */
43 #define CONFIG_BOOTP_DNS2
44 #define CONFIG_BOOTP_SEND_HOSTNAME
45 #define CONFIG_BOOTP_GATEWAY
46 #define CONFIG_BOOTP_SUBNETMASK
47 #define CONFIG_NET_RETRY_COUNT		10
48 #define CONFIG_CMD_PING
49 #define CONFIG_CMD_MII
50 #define CONFIG_DRIVER_TI_CPSW		/* Driver for IP block */
51 #define CONFIG_MII			/* Required in net/eth.c */
52 #define CONFIG_PHY_GIGE			/* per-board part of CPSW */
53 #define CONFIG_PHYLIB
54 #define CONFIG_PHY_ADDR			2
55 
56 /* SPI */
57 #undef	CONFIG_OMAP3_SPI
58 #define CONFIG_TI_QSPI
59 #define CONFIG_SPI_FLASH
60 #define CONFIG_SPI_FLASH_SPANSION
61 #define CONFIG_CMD_SF
62 #define CONFIG_CMD_SPI
63 #define CONFIG_TI_SPI_MMAP
64 #define CONFIG_SF_DEFAULT_SPEED                48000000
65 #define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
66 
67 /* SPI SPL */
68 #define CONFIG_SPL_SPI_SUPPORT
69 #define CONFIG_SPL_SPI_LOAD
70 #define CONFIG_SPL_SPI_FLASH_SUPPORT
71 #define CONFIG_SPL_SPI_BUS             0
72 #define CONFIG_SPL_SPI_CS              0
73 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x20000
74 
75 /* USB xHCI HOST */
76 #define CONFIG_CMD_USB
77 #define CONFIG_USB_HOST
78 #define CONFIG_USB_XHCI
79 #define CONFIG_USB_XHCI_OMAP
80 #define CONFIG_USB_STORAGE
81 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
82 
83 #define CONFIG_OMAP_USB_PHY
84 #define CONFIG_OMAP_USB2PHY2_HOST
85 
86 /* SATA */
87 #define CONFIG_BOARD_LATE_INIT
88 #define CONFIG_CMD_SCSI
89 #define CONFIG_LIBATA
90 #define CONFIG_SCSI_AHCI
91 #define CONFIG_SCSI_AHCI_PLAT
92 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
93 #define CONFIG_SYS_SCSI_MAX_LUN		1
94 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
95 						CONFIG_SYS_SCSI_MAX_LUN)
96 
97 #endif /* __CONFIG_DRA7XX_EVM_H */
98