1 /* 2 * (C) Copyright 2013 3 * Texas Instruments Incorporated. 4 * Lokesh Vutla <lokeshvutla@ti.com> 5 * 6 * Configuration settings for the TI DRA7XX board. 7 * See ti_omap5_common.h for omap5 common settings. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_DRA7XX_EVM_H 13 #define __CONFIG_DRA7XX_EVM_H 14 15 #define CONFIG_DRA7XX 16 #define CONFIG_BOARD_EARLY_INIT_F 17 18 #ifdef CONFIG_SPL_BUILD 19 #define CONFIG_IODELAY_RECALIBRATION 20 #endif 21 22 #define CONFIG_VERY_BIG_RAM 23 #define CONFIG_PHYS_64BIT 24 #define CONFIG_NR_DRAM_BANKS 2 25 #define CONFIG_MAX_MEM_MAPPED 0x80000000 26 27 #ifndef CONFIG_QSPI_BOOT 28 /* MMC ENV related defines */ 29 #define CONFIG_ENV_IS_IN_MMC 30 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ 31 #define CONFIG_ENV_SIZE (128 << 10) 32 #define CONFIG_ENV_OFFSET 0xE0000 33 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 34 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 35 #endif 36 37 #if (CONFIG_CONS_INDEX == 1) 38 #define CONSOLEDEV "ttyO0" 39 #elif (CONFIG_CONS_INDEX == 3) 40 #define CONSOLEDEV "ttyO2" 41 #endif 42 #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ 43 #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ 44 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ 45 #define CONFIG_BAUDRATE 115200 46 47 #define CONFIG_SYS_OMAP_ABE_SYSCK 48 49 #ifndef CONFIG_SPL_BUILD 50 /* Define the default GPT table for eMMC */ 51 #define PARTS_DEFAULT \ 52 /* Linux partitions */ \ 53 "uuid_disk=${uuid_gpt_disk};" \ 54 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \ 55 /* Android partitions */ \ 56 "partitions_android=" \ 57 "uuid_disk=${uuid_gpt_disk};" \ 58 "name=xloader,start=128K,size=128K,uuid=${uuid_gpt_xloader};" \ 59 "name=bootloader,size=384K,uuid=${uuid_gpt_bootloader};" \ 60 "name=environment,size=128K,uuid=${uuid_gpt_environment};" \ 61 "name=misc,size=128K,uuid=${uuid_gpt_misc};" \ 62 "name=efs,start=1280K,size=16M,uuid=${uuid_gpt_efs};" \ 63 "name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \ 64 "name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \ 65 "name=boot,size=10M,uuid=${uuid_gpt_boot};" \ 66 "name=system,size=768M,uuid=${uuid_gpt_system};" \ 67 "name=cache,size=256M,uuid=${uuid_gpt_cache};" \ 68 "name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \ 69 "name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \ 70 "name=userdata,size=-,uuid=${uuid_gpt_userdata}" 71 72 #define DFU_ALT_INFO_MMC \ 73 "dfu_alt_info_mmc=" \ 74 "boot part 0 1;" \ 75 "rootfs part 0 2;" \ 76 "MLO fat 0 1;" \ 77 "MLO.raw raw 0x100 0x100;" \ 78 "u-boot.img.raw raw 0x300 0x400;" \ 79 "spl-os-args.raw raw 0x80 0x80;" \ 80 "spl-os-image.raw raw 0x900 0x2000;" \ 81 "spl-os-args fat 0 1;" \ 82 "spl-os-image fat 0 1;" \ 83 "u-boot.img fat 0 1;" \ 84 "uEnv.txt fat 0 1\0" 85 86 #define DFU_ALT_INFO_EMMC \ 87 "dfu_alt_info_emmc=" \ 88 "rawemmc raw 0 3751936;" \ 89 "boot part 1 1;" \ 90 "rootfs part 1 2;" \ 91 "MLO fat 1 1;" \ 92 "MLO.raw raw 0x100 0x100;" \ 93 "u-boot.img.raw raw 0x300 0x400;" \ 94 "spl-os-args.raw raw 0x80 0x80;" \ 95 "spl-os-image.raw raw 0x900 0x2000;" \ 96 "spl-os-args fat 1 1;" \ 97 "spl-os-image fat 1 1;" \ 98 "u-boot.img fat 1 1;" \ 99 "uEnv.txt fat 1 1\0" 100 101 #define DFU_ALT_INFO_RAM \ 102 "dfu_alt_info_ram=" \ 103 "kernel ram 0x80200000 0x4000000;" \ 104 "fdt ram 0x80f80000 0x80000;" \ 105 "ramdisk ram 0x81000000 0x4000000\0" 106 107 #define DFU_ALT_INFO_QSPI \ 108 "dfu_alt_info_qspi=" \ 109 "MLO raw 0x0 0x010000;" \ 110 "MLO.backup1 raw 0x010000 0x010000;" \ 111 "MLO.backup2 raw 0x020000 0x010000;" \ 112 "MLO.backup3 raw 0x030000 0x010000;" \ 113 "u-boot.img raw 0x040000 0x0100000;" \ 114 "u-boot-spl-os raw 0x140000 0x080000;" \ 115 "u-boot-env raw 0x1C0000 0x010000;" \ 116 "u-boot-env.backup raw 0x1D0000 0x010000;" \ 117 "kernel raw 0x1E0000 0x800000\0" 118 119 #define DFUARGS \ 120 "dfu_bufsiz=0x10000\0" \ 121 DFU_ALT_INFO_MMC \ 122 DFU_ALT_INFO_EMMC \ 123 DFU_ALT_INFO_RAM \ 124 DFU_ALT_INFO_QSPI 125 126 /* Fastboot */ 127 #define CONFIG_USB_FUNCTION_FASTBOOT 128 #define CONFIG_CMD_FASTBOOT 129 #define CONFIG_ANDROID_BOOT_IMAGE 130 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 131 #define CONFIG_FASTBOOT_BUF_SIZE 0x2F000000 132 #define CONFIG_FASTBOOT_FLASH 133 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 134 #endif 135 136 #include <configs/ti_omap5_common.h> 137 138 /* Enhance our eMMC support / experience. */ 139 #define CONFIG_CMD_GPT 140 #define CONFIG_EFI_PARTITION 141 #define CONFIG_RANDOM_UUID 142 #define CONFIG_HSMMC2_8BIT 143 144 /* CPSW Ethernet */ 145 #define CONFIG_CMD_DHCP 146 #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ 147 #define CONFIG_BOOTP_DNS2 148 #define CONFIG_BOOTP_SEND_HOSTNAME 149 #define CONFIG_BOOTP_GATEWAY 150 #define CONFIG_BOOTP_SUBNETMASK 151 #define CONFIG_NET_RETRY_COUNT 10 152 #define CONFIG_CMD_PING 153 #define CONFIG_CMD_MII 154 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ 155 #define CONFIG_MII /* Required in net/eth.c */ 156 #define CONFIG_PHY_GIGE /* per-board part of CPSW */ 157 #define CONFIG_PHYLIB 158 159 /* SPI */ 160 #undef CONFIG_OMAP3_SPI 161 #define CONFIG_CMD_SF 162 #define CONFIG_CMD_SPI 163 #define CONFIG_TI_SPI_MMAP 164 #define CONFIG_SF_DEFAULT_SPEED 64000000 165 #define CONFIG_SF_DEFAULT_MODE SPI_MODE_0 166 #define CONFIG_QSPI_QUAD_SUPPORT 167 168 #ifdef CONFIG_SPL_BUILD 169 #undef CONFIG_DM_SPI 170 #undef CONFIG_DM_SPI_FLASH 171 #endif 172 173 /* 174 * Default to using SPI for environment, etc. 175 * 0x000000 - 0x010000 : QSPI.SPL (64KiB) 176 * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB) 177 * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB) 178 * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB) 179 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) 180 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) 181 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) 182 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) 183 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) 184 * 0x9E0000 - 0x2000000 : USERLAND 185 */ 186 #define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000 187 #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 188 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 189 #if defined(CONFIG_QSPI_BOOT) 190 /* In SPL, use the environment and discard MMC support for space. */ 191 #ifdef CONFIG_SPL_BUILD 192 #undef CONFIG_SPL_MMC_SUPPORT 193 #undef CONFIG_SPL_MAX_SIZE 194 #define CONFIG_SPL_MAX_SIZE (64 << 10) /* 64 KiB */ 195 #endif 196 #define CONFIG_SPL_ENV_SUPPORT 197 #define CONFIG_ENV_IS_IN_SPI_FLASH 198 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 199 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 200 #define CONFIG_ENV_SIZE (64 << 10) 201 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ 202 #define CONFIG_ENV_OFFSET 0x1C0000 203 #define CONFIG_ENV_OFFSET_REDUND 0x1D0000 204 #endif 205 206 /* SPI SPL */ 207 #define CONFIG_SPL_SPI_SUPPORT 208 #define CONFIG_SPL_DMA_SUPPORT 209 #define CONFIG_TI_EDMA3 210 #define CONFIG_SPL_SPI_LOAD 211 #define CONFIG_SPL_SPI_FLASH_SUPPORT 212 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 213 214 #define CONFIG_SUPPORT_EMMC_BOOT 215 216 /* USB xHCI HOST */ 217 #define CONFIG_CMD_USB 218 #define CONFIG_USB_HOST 219 #define CONFIG_USB_XHCI 220 #define CONFIG_USB_XHCI_DWC3 221 #define CONFIG_USB_XHCI_OMAP 222 #define CONFIG_USB_STORAGE 223 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 224 225 #define CONFIG_OMAP_USB_PHY 226 #define CONFIG_OMAP_USB2PHY2_HOST 227 228 /* USB GADGET */ 229 #define CONFIG_USB_DWC3_PHY_OMAP 230 #define CONFIG_USB_DWC3_OMAP 231 #define CONFIG_USB_DWC3 232 #define CONFIG_USB_DWC3_GADGET 233 234 #define CONFIG_USB_GADGET_DOWNLOAD 235 #define CONFIG_USB_GADGET_VBUS_DRAW 2 236 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" 237 #define CONFIG_G_DNL_VENDOR_NUM 0x0451 238 #define CONFIG_G_DNL_PRODUCT_NUM 0xd022 239 #define CONFIG_USB_GADGET_DUALSPEED 240 241 /* USB Device Firmware Update support */ 242 #define CONFIG_USB_FUNCTION_DFU 243 #define CONFIG_DFU_RAM 244 #define CONFIG_CMD_DFU 245 246 #define CONFIG_DFU_MMC 247 #define CONFIG_DFU_RAM 248 #define CONFIG_DFU_SF 249 250 /* SATA */ 251 #define CONFIG_BOARD_LATE_INIT 252 #define CONFIG_CMD_SCSI 253 #define CONFIG_LIBATA 254 #define CONFIG_SCSI_AHCI 255 #define CONFIG_SCSI_AHCI_PLAT 256 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 257 #define CONFIG_SYS_SCSI_MAX_LUN 1 258 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 259 CONFIG_SYS_SCSI_MAX_LUN) 260 261 /* NAND support */ 262 #ifdef CONFIG_NAND 263 /* NAND: device related configs */ 264 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 265 #define CONFIG_SYS_NAND_OOBSIZE 64 266 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 267 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 268 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 269 CONFIG_SYS_NAND_PAGE_SIZE) 270 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 271 /* NAND: driver related configs */ 272 #define CONFIG_NAND_OMAP_GPMC 273 #define CONFIG_NAND_OMAP_ELM 274 #define CONFIG_SYS_NAND_ONFI_DETECTION 275 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW 276 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 277 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 278 10, 11, 12, 13, 14, 15, 16, 17, \ 279 18, 19, 20, 21, 22, 23, 24, 25, \ 280 26, 27, 28, 29, 30, 31, 32, 33, \ 281 34, 35, 36, 37, 38, 39, 40, 41, \ 282 42, 43, 44, 45, 46, 47, 48, 49, \ 283 50, 51, 52, 53, 54, 55, 56, 57, } 284 #define CONFIG_SYS_NAND_ECCSIZE 512 285 #define CONFIG_SYS_NAND_ECCBYTES 14 286 #define MTDIDS_DEFAULT "nand0=nand.0" 287 #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \ 288 "128k(NAND.SPL)," \ 289 "128k(NAND.SPL.backup1)," \ 290 "128k(NAND.SPL.backup2)," \ 291 "128k(NAND.SPL.backup3)," \ 292 "256k(NAND.u-boot-spl-os)," \ 293 "1m(NAND.u-boot)," \ 294 "128k(NAND.u-boot-env)," \ 295 "128k(NAND.u-boot-env.backup1)," \ 296 "8m(NAND.kernel)," \ 297 "-(NAND.file-system)" 298 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 299 /* NAND: SPL related configs */ 300 #ifdef CONFIG_SPL_NAND_SUPPORT 301 #define CONFIG_SPL_NAND_AM33XX_BCH 302 #endif 303 /* NAND: SPL falcon mode configs */ 304 #ifdef CONFIG_SPL_OS_BOOT 305 #define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/ 306 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ 307 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 308 #endif 309 #endif /* !CONFIG_NAND */ 310 311 /* Parallel NOR Support */ 312 #if defined(CONFIG_NOR) 313 /* NOR: device related configs */ 314 #define CONFIG_SYS_MAX_FLASH_SECT 512 315 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 316 #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ 317 /* #define CONFIG_INIT_IGNORE_ERROR */ 318 #undef CONFIG_SYS_NO_FLASH 319 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 320 #define CONFIG_SYS_FLASH_PROTECTION 321 #define CONFIG_SYS_FLASH_CFI 322 #define CONFIG_FLASH_CFI_DRIVER 323 #define CONFIG_FLASH_CFI_MTD 324 #define CONFIG_SYS_MAX_FLASH_BANKS 1 325 #define CONFIG_SYS_FLASH_BASE (0x08000000) 326 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 327 /* Reduce SPL size by removing unlikey targets */ 328 #ifdef CONFIG_NOR_BOOT 329 #define CONFIG_ENV_IS_IN_FLASH 330 #define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */ 331 #define MTDIDS_DEFAULT "nor0=physmap-flash.0" 332 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \ 333 "128k(NOR.SPL)," \ 334 "128k(NOR.SPL.backup1)," \ 335 "128k(NOR.SPL.backup2)," \ 336 "128k(NOR.SPL.backup3)," \ 337 "256k(NOR.u-boot-spl-os)," \ 338 "1m(NOR.u-boot)," \ 339 "128k(NOR.u-boot-env)," \ 340 "128k(NOR.u-boot-env.backup1)," \ 341 "8m(NOR.kernel)," \ 342 "-(NOR.rootfs)" 343 #define CONFIG_ENV_OFFSET 0x001c0000 344 #define CONFIG_ENV_OFFSET_REDUND 0x001e0000 345 #endif 346 #endif /* NOR support */ 347 348 /* EEPROM */ 349 #define CONFIG_EEPROM_CHIP_ADDRESS 0x50 350 #define CONFIG_EEPROM_BUS_ADDRESS 0 351 352 #endif /* __CONFIG_DRA7XX_EVM_H */ 353