xref: /openbmc/u-boot/include/configs/dra7xx_evm.h (revision 5be93569)
1 /*
2  * (C) Copyright 2013
3  * Texas Instruments Incorporated.
4  * Lokesh Vutla	  <lokeshvutla@ti.com>
5  *
6  * Configuration settings for the TI DRA7XX board.
7  * See ti_omap5_common.h for omap5 common settings.
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #ifndef __CONFIG_DRA7XX_EVM_H
13 #define __CONFIG_DRA7XX_EVM_H
14 
15 #define CONFIG_DRA7XX
16 #define CONFIG_BOARD_EARLY_INIT_F
17 
18 #ifdef CONFIG_SPL_BUILD
19 #define CONFIG_IODELAY_RECALIBRATION
20 #endif
21 
22 #ifndef CONFIG_QSPI_BOOT
23 /* MMC ENV related defines */
24 #define CONFIG_ENV_IS_IN_MMC
25 #define CONFIG_SYS_MMC_ENV_DEV		1	/* SLOT2: eMMC(1) */
26 #define CONFIG_ENV_SIZE			(128 << 10)
27 #define CONFIG_ENV_OFFSET		0xE0000
28 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
29 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
30 #endif
31 
32 #if (CONFIG_CONS_INDEX == 1)
33 #define CONSOLEDEV			"ttyO0"
34 #elif (CONFIG_CONS_INDEX == 3)
35 #define CONSOLEDEV			"ttyO2"
36 #endif
37 #define CONFIG_SYS_NS16550_COM1		UART1_BASE	/* Base EVM has UART0 */
38 #define CONFIG_SYS_NS16550_COM2		UART2_BASE	/* UART2 */
39 #define CONFIG_SYS_NS16550_COM3		UART3_BASE	/* UART3 */
40 #define CONFIG_BAUDRATE			115200
41 
42 #define CONFIG_SYS_OMAP_ABE_SYSCK
43 
44 #ifndef CONFIG_SPL_BUILD
45 /* Define the default GPT table for eMMC */
46 #define PARTS_DEFAULT \
47 	"uuid_disk=${uuid_gpt_disk};" \
48 	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}"
49 
50 #define DFU_ALT_INFO_MMC \
51 	"dfu_alt_info_mmc=" \
52 	"boot part 0 1;" \
53 	"rootfs part 0 2;" \
54 	"MLO fat 0 1;" \
55 	"MLO.raw raw 0x100 0x100;" \
56 	"u-boot.img.raw raw 0x300 0x400;" \
57 	"spl-os-args.raw raw 0x80 0x80;" \
58 	"spl-os-image.raw raw 0x900 0x2000;" \
59 	"spl-os-args fat 0 1;" \
60 	"spl-os-image fat 0 1;" \
61 	"u-boot.img fat 0 1;" \
62 	"uEnv.txt fat 0 1\0"
63 
64 #define DFU_ALT_INFO_EMMC \
65 	"dfu_alt_info_emmc=" \
66 	"rawemmc raw 0 3751936;" \
67 	"boot part 1 1;" \
68 	"rootfs part 1 2;" \
69 	"MLO fat 1 1;" \
70 	"MLO.raw raw 0x100 0x100;" \
71 	"u-boot.img.raw raw 0x300 0x400;" \
72 	"spl-os-args.raw raw 0x80 0x80;" \
73 	"spl-os-image.raw raw 0x900 0x2000;" \
74 	"spl-os-args fat 1 1;" \
75 	"spl-os-image fat 1 1;" \
76 	"u-boot.img fat 1 1;" \
77 	"uEnv.txt fat 1 1\0"
78 
79 #define DFU_ALT_INFO_RAM \
80 	"dfu_alt_info_ram=" \
81 	"kernel ram 0x80200000 0x4000000;" \
82 	"fdt ram 0x80f80000 0x80000;" \
83 	"ramdisk ram 0x81000000 0x4000000\0"
84 
85 #define DFU_ALT_INFO_QSPI \
86 	"dfu_alt_info_qspi=" \
87 	"MLO raw 0x0 0x010000;" \
88 	"MLO.backup1 raw 0x010000 0x010000;" \
89 	"MLO.backup2 raw 0x020000 0x010000;" \
90 	"MLO.backup3 raw 0x030000 0x010000;" \
91 	"u-boot.img raw 0x040000 0x0100000;" \
92 	"u-boot-spl-os raw 0x140000 0x080000;" \
93 	"u-boot-env raw 0x1C0000 0x010000;" \
94 	"u-boot-env.backup raw 0x1D0000 0x010000;" \
95 	"kernel raw 0x1E0000 0x800000\0"
96 
97 #define DFUARGS \
98 	"dfu_bufsiz=0x10000\0" \
99 	DFU_ALT_INFO_MMC \
100 	DFU_ALT_INFO_EMMC \
101 	DFU_ALT_INFO_RAM \
102 	DFU_ALT_INFO_QSPI
103 
104 /* Fastboot */
105 #define CONFIG_USB_FUNCTION_FASTBOOT
106 #define CONFIG_CMD_FASTBOOT
107 #define CONFIG_ANDROID_BOOT_IMAGE
108 #define CONFIG_FASTBOOT_BUF_ADDR    CONFIG_SYS_LOAD_ADDR
109 #define CONFIG_FASTBOOT_BUF_SIZE    0x2F000000
110 #define CONFIG_FASTBOOT_FLASH
111 #define CONFIG_FASTBOOT_FLASH_MMC_DEV   1
112 #endif
113 
114 #include <configs/ti_omap5_common.h>
115 
116 /* Enhance our eMMC support / experience. */
117 #define CONFIG_CMD_GPT
118 #define CONFIG_EFI_PARTITION
119 #define CONFIG_HSMMC2_8BIT
120 
121 /* CPSW Ethernet */
122 #define CONFIG_CMD_DHCP
123 #define CONFIG_BOOTP_DNS		/* Configurable parts of CMD_DHCP */
124 #define CONFIG_BOOTP_DNS2
125 #define CONFIG_BOOTP_SEND_HOSTNAME
126 #define CONFIG_BOOTP_GATEWAY
127 #define CONFIG_BOOTP_SUBNETMASK
128 #define CONFIG_NET_RETRY_COUNT		10
129 #define CONFIG_CMD_PING
130 #define CONFIG_CMD_MII
131 #define CONFIG_DRIVER_TI_CPSW		/* Driver for IP block */
132 #define CONFIG_MII			/* Required in net/eth.c */
133 #define CONFIG_PHY_GIGE			/* per-board part of CPSW */
134 #define CONFIG_PHYLIB
135 
136 /* SPI */
137 #undef	CONFIG_OMAP3_SPI
138 #define CONFIG_CMD_SF
139 #define CONFIG_CMD_SPI
140 #define CONFIG_TI_SPI_MMAP
141 #define CONFIG_SF_DEFAULT_SPEED                48000000
142 #define CONFIG_DEFAULT_SPI_MODE                SPI_MODE_3
143 #define CONFIG_QSPI_QUAD_SUPPORT
144 
145 /*
146  * Default to using SPI for environment, etc.
147  * 0x000000 - 0x010000 : QSPI.SPL (64KiB)
148  * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB)
149  * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB)
150  * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB)
151  * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
152  * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
153  * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
154  * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
155  * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
156  * 0x9E0000 - 0x2000000 : USERLAND
157  */
158 #define CONFIG_SYS_SPI_KERNEL_OFFS	0x1E0000
159 #define CONFIG_SYS_SPI_ARGS_OFFS	0x140000
160 #define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
161 #if defined(CONFIG_QSPI_BOOT)
162 /* In SPL, use the environment and discard MMC support for space. */
163 #ifdef CONFIG_SPL_BUILD
164 #undef CONFIG_SPL_MMC_SUPPORT
165 #undef CONFIG_SPL_MAX_SIZE
166 #define CONFIG_SPL_MAX_SIZE             (64 << 10) /* 64 KiB */
167 #endif
168 #define CONFIG_SPL_ENV_SUPPORT
169 #define CONFIG_ENV_IS_IN_SPI_FLASH
170 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
171 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
172 #define CONFIG_ENV_SIZE			(64 << 10)
173 #define CONFIG_ENV_SECT_SIZE		(64 << 10) /* 64 KB sectors */
174 #define CONFIG_ENV_OFFSET		0x1C0000
175 #define CONFIG_ENV_OFFSET_REDUND	0x1D0000
176 #endif
177 
178 /* SPI SPL */
179 #define CONFIG_SPL_SPI_SUPPORT
180 #define CONFIG_SPL_DMA_SUPPORT
181 #define CONFIG_TI_EDMA3
182 #define CONFIG_SPL_SPI_LOAD
183 #define CONFIG_SPL_SPI_FLASH_SUPPORT
184 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x40000
185 
186 #define CONFIG_SUPPORT_EMMC_BOOT
187 
188 /* USB xHCI HOST */
189 #define CONFIG_CMD_USB
190 #define CONFIG_USB_HOST
191 #define CONFIG_USB_XHCI
192 #define CONFIG_USB_XHCI_DWC3
193 #define CONFIG_USB_XHCI_OMAP
194 #define CONFIG_USB_STORAGE
195 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
196 
197 #define CONFIG_OMAP_USB_PHY
198 #define CONFIG_OMAP_USB2PHY2_HOST
199 
200 /* USB GADGET */
201 #define CONFIG_USB_DWC3_PHY_OMAP
202 #define CONFIG_USB_DWC3_OMAP
203 #define CONFIG_USB_DWC3
204 #define CONFIG_USB_DWC3_GADGET
205 
206 #define CONFIG_USB_GADGET
207 #define CONFIG_USB_GADGET_DOWNLOAD
208 #define CONFIG_USB_GADGET_VBUS_DRAW 2
209 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
210 #define CONFIG_G_DNL_VENDOR_NUM 0x0451
211 #define CONFIG_G_DNL_PRODUCT_NUM 0xd022
212 #define CONFIG_USB_GADGET_DUALSPEED
213 
214 /* USB Device Firmware Update support */
215 #define CONFIG_USB_FUNCTION_DFU
216 #define CONFIG_DFU_RAM
217 #define CONFIG_CMD_DFU
218 
219 #define CONFIG_DFU_MMC
220 #define CONFIG_DFU_RAM
221 #define CONFIG_DFU_SF
222 
223 /* SATA */
224 #define CONFIG_BOARD_LATE_INIT
225 #define CONFIG_CMD_SCSI
226 #define CONFIG_LIBATA
227 #define CONFIG_SCSI_AHCI
228 #define CONFIG_SCSI_AHCI_PLAT
229 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
230 #define CONFIG_SYS_SCSI_MAX_LUN		1
231 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
232 						CONFIG_SYS_SCSI_MAX_LUN)
233 
234 /* NAND support */
235 #ifdef CONFIG_NAND
236 /* NAND: device related configs */
237 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
238 #define CONFIG_SYS_NAND_OOBSIZE		64
239 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
240 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
241 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
242 					 CONFIG_SYS_NAND_PAGE_SIZE)
243 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
244 /* NAND: driver related configs */
245 #define CONFIG_NAND_OMAP_GPMC
246 #define CONFIG_NAND_OMAP_ELM
247 #define CONFIG_SYS_NAND_ONFI_DETECTION
248 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW
249 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
250 #define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
251 					 10, 11, 12, 13, 14, 15, 16, 17, \
252 					 18, 19, 20, 21, 22, 23, 24, 25, \
253 					 26, 27, 28, 29, 30, 31, 32, 33, \
254 					 34, 35, 36, 37, 38, 39, 40, 41, \
255 					 42, 43, 44, 45, 46, 47, 48, 49, \
256 					 50, 51, 52, 53, 54, 55, 56, 57, }
257 #define CONFIG_SYS_NAND_ECCSIZE		512
258 #define CONFIG_SYS_NAND_ECCBYTES	14
259 #define MTDIDS_DEFAULT			"nand0=nand.0"
260 #define MTDPARTS_DEFAULT		"mtdparts=nand.0:" \
261 					"128k(NAND.SPL)," \
262 					"128k(NAND.SPL.backup1)," \
263 					"128k(NAND.SPL.backup2)," \
264 					"128k(NAND.SPL.backup3)," \
265 					"256k(NAND.u-boot-spl-os)," \
266 					"1m(NAND.u-boot)," \
267 					"128k(NAND.u-boot-env)," \
268 					"128k(NAND.u-boot-env.backup1)," \
269 					"8m(NAND.kernel)," \
270 					"-(NAND.file-system)"
271 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x000c0000
272 /* NAND: SPL related configs */
273 #ifdef CONFIG_SPL_NAND_SUPPORT
274 #define CONFIG_SPL_NAND_AM33XX_BCH
275 #endif
276 /* NAND: SPL falcon mode configs */
277 #ifdef CONFIG_SPL_OS_BOOT
278 #define CONFIG_CMD_SPL_NAND_OFS		0x00080000 /* os-boot params*/
279 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00200000 /* kernel offset */
280 #define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
281 #endif
282 #endif /* !CONFIG_NAND */
283 
284 /* Parallel NOR Support */
285 #if defined(CONFIG_NOR)
286 /* NOR: device related configs */
287 #define CONFIG_SYS_MAX_FLASH_SECT	512
288 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
289 #define CONFIG_SYS_FLASH_SIZE		(64 * 1024 * 1024) /* 64 MB */
290 /* #define CONFIG_INIT_IGNORE_ERROR */
291 #undef CONFIG_SYS_NO_FLASH
292 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
293 #define CONFIG_SYS_FLASH_PROTECTION
294 #define CONFIG_SYS_FLASH_CFI
295 #define CONFIG_FLASH_CFI_DRIVER
296 #define CONFIG_FLASH_CFI_MTD
297 #define CONFIG_SYS_MAX_FLASH_BANKS	1
298 #define CONFIG_SYS_FLASH_BASE		(0x08000000)
299 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
300 /* Reduce SPL size by removing unlikey targets */
301 #ifdef CONFIG_NOR_BOOT
302 #define CONFIG_ENV_IS_IN_FLASH
303 #define CONFIG_ENV_SECT_SIZE		(128 * 1024)	/* 128 KiB */
304 #define MTDIDS_DEFAULT			"nor0=physmap-flash.0"
305 #define MTDPARTS_DEFAULT		"mtdparts=physmap-flash.0:" \
306 					"128k(NOR.SPL)," \
307 					"128k(NOR.SPL.backup1)," \
308 					"128k(NOR.SPL.backup2)," \
309 					"128k(NOR.SPL.backup3)," \
310 					"256k(NOR.u-boot-spl-os)," \
311 					"1m(NOR.u-boot)," \
312 					"128k(NOR.u-boot-env)," \
313 					"128k(NOR.u-boot-env.backup1)," \
314 					"8m(NOR.kernel)," \
315 					"-(NOR.rootfs)"
316 #define CONFIG_ENV_OFFSET		0x001c0000
317 #define CONFIG_ENV_OFFSET_REDUND	0x001e0000
318 #endif
319 #endif  /* NOR support */
320 
321 #endif /* __CONFIG_DRA7XX_EVM_H */
322