1 /* 2 * (C) Copyright 2013 3 * Texas Instruments Incorporated. 4 * Lokesh Vutla <lokeshvutla@ti.com> 5 * 6 * Configuration settings for the TI DRA7XX board. 7 * See ti_omap5_common.h for omap5 common settings. 8 * 9 * SPDX-License-Identifier: GPL-2.0+ 10 */ 11 12 #ifndef __CONFIG_DRA7XX_EVM_H 13 #define __CONFIG_DRA7XX_EVM_H 14 15 #define CONFIG_DRA7XX 16 #define CONFIG_BOARD_EARLY_INIT_F 17 18 #ifdef CONFIG_SPL_BUILD 19 #define CONFIG_IODELAY_RECALIBRATION 20 #endif 21 22 #ifndef CONFIG_QSPI_BOOT 23 /* MMC ENV related defines */ 24 #define CONFIG_ENV_IS_IN_MMC 25 #define CONFIG_SYS_MMC_ENV_DEV 1 /* SLOT2: eMMC(1) */ 26 #define CONFIG_ENV_SIZE (128 << 10) 27 #define CONFIG_ENV_OFFSET 0xE0000 28 #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) 29 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 30 #endif 31 32 #if (CONFIG_CONS_INDEX == 1) 33 #define CONSOLEDEV "ttyO0" 34 #elif (CONFIG_CONS_INDEX == 3) 35 #define CONSOLEDEV "ttyO2" 36 #endif 37 #define CONFIG_SYS_NS16550_COM1 UART1_BASE /* Base EVM has UART0 */ 38 #define CONFIG_SYS_NS16550_COM2 UART2_BASE /* UART2 */ 39 #define CONFIG_SYS_NS16550_COM3 UART3_BASE /* UART3 */ 40 #define CONFIG_BAUDRATE 115200 41 42 #define CONFIG_SYS_OMAP_ABE_SYSCK 43 44 #ifndef CONFIG_SPL_BUILD 45 /* Define the default GPT table for eMMC */ 46 #define PARTS_DEFAULT \ 47 "uuid_disk=${uuid_gpt_disk};" \ 48 "name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}" 49 50 #define DFU_ALT_INFO_MMC \ 51 "dfu_alt_info_mmc=" \ 52 "boot part 0 1;" \ 53 "rootfs part 0 2;" \ 54 "MLO fat 0 1;" \ 55 "MLO.raw raw 0x100 0x100;" \ 56 "u-boot.img.raw raw 0x300 0x400;" \ 57 "spl-os-args.raw raw 0x80 0x80;" \ 58 "spl-os-image.raw raw 0x900 0x2000;" \ 59 "spl-os-args fat 0 1;" \ 60 "spl-os-image fat 0 1;" \ 61 "u-boot.img fat 0 1;" \ 62 "uEnv.txt fat 0 1\0" 63 64 #define DFU_ALT_INFO_EMMC \ 65 "dfu_alt_info_emmc=" \ 66 "rawemmc raw 0 3751936;" \ 67 "boot part 1 1;" \ 68 "rootfs part 1 2;" \ 69 "MLO fat 1 1;" \ 70 "MLO.raw raw 0x100 0x100;" \ 71 "u-boot.img.raw raw 0x300 0x400;" \ 72 "spl-os-args.raw raw 0x80 0x80;" \ 73 "spl-os-image.raw raw 0x900 0x2000;" \ 74 "spl-os-args fat 1 1;" \ 75 "spl-os-image fat 1 1;" \ 76 "u-boot.img fat 1 1;" \ 77 "uEnv.txt fat 1 1\0" 78 79 #define DFU_ALT_INFO_RAM \ 80 "dfu_alt_info_ram=" \ 81 "kernel ram 0x80200000 0x4000000;" \ 82 "fdt ram 0x80f80000 0x80000;" \ 83 "ramdisk ram 0x81000000 0x4000000\0" 84 85 #define DFUARGS \ 86 "dfu_bufsiz=0x10000\0" \ 87 DFU_ALT_INFO_MMC \ 88 DFU_ALT_INFO_EMMC \ 89 DFU_ALT_INFO_RAM 90 91 /* Fastboot */ 92 #define CONFIG_USB_FUNCTION_FASTBOOT 93 #define CONFIG_CMD_FASTBOOT 94 #define CONFIG_ANDROID_BOOT_IMAGE 95 #define CONFIG_FASTBOOT_BUF_ADDR CONFIG_SYS_LOAD_ADDR 96 #define CONFIG_FASTBOOT_BUF_SIZE 0x2F000000 97 #define CONFIG_FASTBOOT_FLASH 98 #define CONFIG_FASTBOOT_FLASH_MMC_DEV 1 99 #endif 100 101 #include <configs/ti_omap5_common.h> 102 103 /* Enhance our eMMC support / experience. */ 104 #define CONFIG_CMD_GPT 105 #define CONFIG_EFI_PARTITION 106 #define CONFIG_HSMMC2_8BIT 107 108 /* CPSW Ethernet */ 109 #define CONFIG_CMD_DHCP 110 #define CONFIG_BOOTP_DNS /* Configurable parts of CMD_DHCP */ 111 #define CONFIG_BOOTP_DNS2 112 #define CONFIG_BOOTP_SEND_HOSTNAME 113 #define CONFIG_BOOTP_GATEWAY 114 #define CONFIG_BOOTP_SUBNETMASK 115 #define CONFIG_NET_RETRY_COUNT 10 116 #define CONFIG_CMD_PING 117 #define CONFIG_CMD_MII 118 #define CONFIG_DRIVER_TI_CPSW /* Driver for IP block */ 119 #define CONFIG_MII /* Required in net/eth.c */ 120 #define CONFIG_PHY_GIGE /* per-board part of CPSW */ 121 #define CONFIG_PHYLIB 122 123 /* SPI */ 124 #undef CONFIG_OMAP3_SPI 125 #define CONFIG_TI_QSPI 126 #define CONFIG_SPI_FLASH_SPANSION 127 #define CONFIG_CMD_SF 128 #define CONFIG_CMD_SPI 129 #define CONFIG_TI_SPI_MMAP 130 #define CONFIG_SF_DEFAULT_SPEED 48000000 131 #define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 132 #define CONFIG_QSPI_QUAD_SUPPORT 133 134 /* 135 * Default to using SPI for environment, etc. 136 * 0x000000 - 0x010000 : QSPI.SPL (64KiB) 137 * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB) 138 * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB) 139 * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB) 140 * 0x040000 - 0x140000 : QSPI.u-boot (1MiB) 141 * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB) 142 * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB) 143 * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB) 144 * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB) 145 * 0x9E0000 - 0x2000000 : USERLAND 146 */ 147 #define CONFIG_SYS_SPI_KERNEL_OFFS 0x1E0000 148 #define CONFIG_SYS_SPI_ARGS_OFFS 0x140000 149 #define CONFIG_SYS_SPI_ARGS_SIZE 0x80000 150 #if defined(CONFIG_QSPI_BOOT) 151 /* In SPL, use the environment and discard MMC support for space. */ 152 #ifdef CONFIG_SPL_BUILD 153 #undef CONFIG_SPL_MMC_SUPPORT 154 #undef CONFIG_SPL_MAX_SIZE 155 #define CONFIG_SPL_MAX_SIZE (64 << 10) /* 64 KiB */ 156 #endif 157 #define CONFIG_SPL_ENV_SUPPORT 158 #define CONFIG_ENV_IS_IN_SPI_FLASH 159 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT 160 #define CONFIG_ENV_SPI_MAX_HZ CONFIG_SF_DEFAULT_SPEED 161 #define CONFIG_ENV_SIZE (64 << 10) 162 #define CONFIG_ENV_SECT_SIZE (64 << 10) /* 64 KB sectors */ 163 #define CONFIG_ENV_OFFSET 0x1C0000 164 #define CONFIG_ENV_OFFSET_REDUND 0x1D0000 165 #endif 166 167 /* SPI SPL */ 168 #define CONFIG_SPL_SPI_SUPPORT 169 #define CONFIG_SPL_SPI_LOAD 170 #define CONFIG_SPL_SPI_FLASH_SUPPORT 171 #define CONFIG_SYS_SPI_U_BOOT_OFFS 0x40000 172 173 #define CONFIG_SUPPORT_EMMC_BOOT 174 175 /* USB xHCI HOST */ 176 #define CONFIG_CMD_USB 177 #define CONFIG_USB_HOST 178 #define CONFIG_USB_XHCI 179 #define CONFIG_USB_XHCI_DWC3 180 #define CONFIG_USB_XHCI_OMAP 181 #define CONFIG_USB_STORAGE 182 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2 183 184 #define CONFIG_OMAP_USB_PHY 185 #define CONFIG_OMAP_USB2PHY2_HOST 186 187 /* USB GADGET */ 188 #define CONFIG_USB_DWC3_PHY_OMAP 189 #define CONFIG_USB_DWC3_OMAP 190 #define CONFIG_USB_DWC3 191 #define CONFIG_USB_DWC3_GADGET 192 193 #define CONFIG_USB_GADGET 194 #define CONFIG_USB_GADGET_DOWNLOAD 195 #define CONFIG_USB_GADGET_VBUS_DRAW 2 196 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments" 197 #define CONFIG_G_DNL_VENDOR_NUM 0x0451 198 #define CONFIG_G_DNL_PRODUCT_NUM 0xd022 199 #define CONFIG_USB_GADGET_DUALSPEED 200 201 /* USB Device Firmware Update support */ 202 #define CONFIG_USB_FUNCTION_DFU 203 #define CONFIG_DFU_RAM 204 #define CONFIG_CMD_DFU 205 206 #define CONFIG_DFU_MMC 207 #define CONFIG_DFU_RAM 208 209 /* SATA */ 210 #define CONFIG_BOARD_LATE_INIT 211 #define CONFIG_CMD_SCSI 212 #define CONFIG_LIBATA 213 #define CONFIG_SCSI_AHCI 214 #define CONFIG_SCSI_AHCI_PLAT 215 #define CONFIG_SYS_SCSI_MAX_SCSI_ID 1 216 #define CONFIG_SYS_SCSI_MAX_LUN 1 217 #define CONFIG_SYS_SCSI_MAX_DEVICE (CONFIG_SYS_SCSI_MAX_SCSI_ID * \ 218 CONFIG_SYS_SCSI_MAX_LUN) 219 220 /* NAND support */ 221 #ifdef CONFIG_NAND 222 /* NAND: device related configs */ 223 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 224 #define CONFIG_SYS_NAND_OOBSIZE 64 225 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 226 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 227 #define CONFIG_SYS_NAND_PAGE_COUNT (CONFIG_SYS_NAND_BLOCK_SIZE / \ 228 CONFIG_SYS_NAND_PAGE_SIZE) 229 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 230 /* NAND: driver related configs */ 231 #define CONFIG_NAND_OMAP_GPMC 232 #define CONFIG_NAND_OMAP_ELM 233 #define CONFIG_SYS_NAND_ONFI_DETECTION 234 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_BCH8_CODE_HW 235 #define CONFIG_SYS_NAND_BAD_BLOCK_POS NAND_LARGE_BADBLOCK_POS 236 #define CONFIG_SYS_NAND_ECCPOS { 2, 3, 4, 5, 6, 7, 8, 9, \ 237 10, 11, 12, 13, 14, 15, 16, 17, \ 238 18, 19, 20, 21, 22, 23, 24, 25, \ 239 26, 27, 28, 29, 30, 31, 32, 33, \ 240 34, 35, 36, 37, 38, 39, 40, 41, \ 241 42, 43, 44, 45, 46, 47, 48, 49, \ 242 50, 51, 52, 53, 54, 55, 56, 57, } 243 #define CONFIG_SYS_NAND_ECCSIZE 512 244 #define CONFIG_SYS_NAND_ECCBYTES 14 245 #define MTDIDS_DEFAULT "nand0=nand.0" 246 #define MTDPARTS_DEFAULT "mtdparts=nand.0:" \ 247 "128k(NAND.SPL)," \ 248 "128k(NAND.SPL.backup1)," \ 249 "128k(NAND.SPL.backup2)," \ 250 "128k(NAND.SPL.backup3)," \ 251 "256k(NAND.u-boot-spl-os)," \ 252 "1m(NAND.u-boot)," \ 253 "128k(NAND.u-boot-env)," \ 254 "128k(NAND.u-boot-env.backup1)," \ 255 "8m(NAND.kernel)," \ 256 "-(NAND.file-system)" 257 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x000c0000 258 /* NAND: SPL related configs */ 259 #ifdef CONFIG_SPL_NAND_SUPPORT 260 #define CONFIG_SPL_NAND_AM33XX_BCH 261 #endif 262 /* NAND: SPL falcon mode configs */ 263 #ifdef CONFIG_SPL_OS_BOOT 264 #define CONFIG_CMD_SPL_NAND_OFS 0x00080000 /* os-boot params*/ 265 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x00200000 /* kernel offset */ 266 #define CONFIG_CMD_SPL_WRITE_SIZE 0x2000 267 #endif 268 #endif /* !CONFIG_NAND */ 269 270 /* Parallel NOR Support */ 271 #if defined(CONFIG_NOR) 272 /* NOR: device related configs */ 273 #define CONFIG_SYS_MAX_FLASH_SECT 512 274 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT 275 #define CONFIG_SYS_FLASH_SIZE (64 * 1024 * 1024) /* 64 MB */ 276 /* #define CONFIG_INIT_IGNORE_ERROR */ 277 #undef CONFIG_SYS_NO_FLASH 278 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 279 #define CONFIG_SYS_FLASH_PROTECTION 280 #define CONFIG_SYS_FLASH_CFI 281 #define CONFIG_FLASH_CFI_DRIVER 282 #define CONFIG_FLASH_CFI_MTD 283 #define CONFIG_SYS_MAX_FLASH_BANKS 1 284 #define CONFIG_SYS_FLASH_BASE (0x08000000) 285 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_FLASH_BASE 286 /* Reduce SPL size by removing unlikey targets */ 287 #ifdef CONFIG_NOR_BOOT 288 #define CONFIG_ENV_IS_IN_FLASH 289 #define CONFIG_ENV_SECT_SIZE (128 * 1024) /* 128 KiB */ 290 #define MTDIDS_DEFAULT "nor0=physmap-flash.0" 291 #define MTDPARTS_DEFAULT "mtdparts=physmap-flash.0:" \ 292 "128k(NOR.SPL)," \ 293 "128k(NOR.SPL.backup1)," \ 294 "128k(NOR.SPL.backup2)," \ 295 "128k(NOR.SPL.backup3)," \ 296 "256k(NOR.u-boot-spl-os)," \ 297 "1m(NOR.u-boot)," \ 298 "128k(NOR.u-boot-env)," \ 299 "128k(NOR.u-boot-env.backup1)," \ 300 "8m(NOR.kernel)," \ 301 "-(NOR.rootfs)" 302 #define CONFIG_ENV_OFFSET 0x001c0000 303 #define CONFIG_ENV_OFFSET_REDUND 0x001e0000 304 #endif 305 #endif /* NOR support */ 306 307 #endif /* __CONFIG_DRA7XX_EVM_H */ 308