xref: /openbmc/u-boot/include/configs/dra7xx_evm.h (revision 450f3c713543be514905468f08dfda312d640802)
1 /*
2  * (C) Copyright 2013
3  * Texas Instruments Incorporated.
4  * Lokesh Vutla	  <lokeshvutla@ti.com>
5  *
6  * Configuration settings for the TI DRA7XX board.
7  * See ti_omap5_common.h for omap5 common settings.
8  *
9  * SPDX-License-Identifier:	GPL-2.0+
10  */
11 
12 #ifndef __CONFIG_DRA7XX_EVM_H
13 #define __CONFIG_DRA7XX_EVM_H
14 
15 #define CONFIG_DRA7XX
16 #define CONFIG_BOARD_EARLY_INIT_F
17 
18 #ifdef CONFIG_SPL_BUILD
19 #define CONFIG_IODELAY_RECALIBRATION
20 #endif
21 
22 #ifndef CONFIG_QSPI_BOOT
23 /* MMC ENV related defines */
24 #define CONFIG_ENV_IS_IN_MMC
25 #define CONFIG_SYS_MMC_ENV_DEV		1	/* SLOT2: eMMC(1) */
26 #define CONFIG_ENV_SIZE			(128 << 10)
27 #define CONFIG_ENV_OFFSET		0xE0000
28 #define CONFIG_ENV_OFFSET_REDUND	(CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE)
29 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
30 #endif
31 
32 #if (CONFIG_CONS_INDEX == 1)
33 #define CONSOLEDEV			"ttyO0"
34 #elif (CONFIG_CONS_INDEX == 3)
35 #define CONSOLEDEV			"ttyO2"
36 #endif
37 #define CONFIG_SYS_NS16550_COM1		UART1_BASE	/* Base EVM has UART0 */
38 #define CONFIG_SYS_NS16550_COM2		UART2_BASE	/* UART2 */
39 #define CONFIG_SYS_NS16550_COM3		UART3_BASE	/* UART3 */
40 #define CONFIG_BAUDRATE			115200
41 
42 #define CONFIG_SYS_OMAP_ABE_SYSCK
43 
44 #ifndef CONFIG_SPL_BUILD
45 /* Define the default GPT table for eMMC */
46 #define PARTS_DEFAULT \
47 	/* Linux partitions */ \
48 	"uuid_disk=${uuid_gpt_disk};" \
49 	"name=rootfs,start=2MiB,size=-,uuid=${uuid_gpt_rootfs}\0" \
50 	/* Android partitions */ \
51 	"partitions_android=" \
52 	"uuid_disk=${uuid_gpt_disk};" \
53 	"name=xloader,start=128K,size=128K,uuid=${uuid_gpt_xloader};" \
54 	"name=bootloader,size=384K,uuid=${uuid_gpt_bootloader};" \
55 	"name=environment,size=128K,uuid=${uuid_gpt_environment};" \
56 	"name=misc,size=128K,uuid=${uuid_gpt_misc};" \
57 	"name=efs,start=1280K,size=16M,uuid=${uuid_gpt_efs};" \
58 	"name=crypto,size=16K,uuid=${uuid_gpt_crypto};" \
59 	"name=recovery,size=10M,uuid=${uuid_gpt_recovery};" \
60 	"name=boot,size=10M,uuid=${uuid_gpt_boot};" \
61 	"name=system,size=768M,uuid=${uuid_gpt_system};" \
62 	"name=cache,size=256M,uuid=${uuid_gpt_cache};" \
63 	"name=ipu1,size=1M,uuid=${uuid_gpt_ipu1};" \
64 	"name=ipu2,size=1M,uuid=${uuid_gpt_ipu2};" \
65 	"name=userdata,size=-,uuid=${uuid_gpt_userdata}"
66 
67 #define DFU_ALT_INFO_MMC \
68 	"dfu_alt_info_mmc=" \
69 	"boot part 0 1;" \
70 	"rootfs part 0 2;" \
71 	"MLO fat 0 1;" \
72 	"MLO.raw raw 0x100 0x100;" \
73 	"u-boot.img.raw raw 0x300 0x400;" \
74 	"spl-os-args.raw raw 0x80 0x80;" \
75 	"spl-os-image.raw raw 0x900 0x2000;" \
76 	"spl-os-args fat 0 1;" \
77 	"spl-os-image fat 0 1;" \
78 	"u-boot.img fat 0 1;" \
79 	"uEnv.txt fat 0 1\0"
80 
81 #define DFU_ALT_INFO_EMMC \
82 	"dfu_alt_info_emmc=" \
83 	"rawemmc raw 0 3751936;" \
84 	"boot part 1 1;" \
85 	"rootfs part 1 2;" \
86 	"MLO fat 1 1;" \
87 	"MLO.raw raw 0x100 0x100;" \
88 	"u-boot.img.raw raw 0x300 0x400;" \
89 	"spl-os-args.raw raw 0x80 0x80;" \
90 	"spl-os-image.raw raw 0x900 0x2000;" \
91 	"spl-os-args fat 1 1;" \
92 	"spl-os-image fat 1 1;" \
93 	"u-boot.img fat 1 1;" \
94 	"uEnv.txt fat 1 1\0"
95 
96 #define DFU_ALT_INFO_RAM \
97 	"dfu_alt_info_ram=" \
98 	"kernel ram 0x80200000 0x4000000;" \
99 	"fdt ram 0x80f80000 0x80000;" \
100 	"ramdisk ram 0x81000000 0x4000000\0"
101 
102 #define DFU_ALT_INFO_QSPI \
103 	"dfu_alt_info_qspi=" \
104 	"MLO raw 0x0 0x010000;" \
105 	"MLO.backup1 raw 0x010000 0x010000;" \
106 	"MLO.backup2 raw 0x020000 0x010000;" \
107 	"MLO.backup3 raw 0x030000 0x010000;" \
108 	"u-boot.img raw 0x040000 0x0100000;" \
109 	"u-boot-spl-os raw 0x140000 0x080000;" \
110 	"u-boot-env raw 0x1C0000 0x010000;" \
111 	"u-boot-env.backup raw 0x1D0000 0x010000;" \
112 	"kernel raw 0x1E0000 0x800000\0"
113 
114 #define DFUARGS \
115 	"dfu_bufsiz=0x10000\0" \
116 	DFU_ALT_INFO_MMC \
117 	DFU_ALT_INFO_EMMC \
118 	DFU_ALT_INFO_RAM \
119 	DFU_ALT_INFO_QSPI
120 
121 /* Fastboot */
122 #define CONFIG_USB_FUNCTION_FASTBOOT
123 #define CONFIG_CMD_FASTBOOT
124 #define CONFIG_ANDROID_BOOT_IMAGE
125 #define CONFIG_FASTBOOT_BUF_ADDR    CONFIG_SYS_LOAD_ADDR
126 #define CONFIG_FASTBOOT_BUF_SIZE    0x2F000000
127 #define CONFIG_FASTBOOT_FLASH
128 #define CONFIG_FASTBOOT_FLASH_MMC_DEV   1
129 #endif
130 
131 #include <configs/ti_omap5_common.h>
132 
133 /* Enhance our eMMC support / experience. */
134 #define CONFIG_CMD_GPT
135 #define CONFIG_EFI_PARTITION
136 #define CONFIG_RANDOM_UUID
137 #define CONFIG_HSMMC2_8BIT
138 
139 /* CPSW Ethernet */
140 #define CONFIG_CMD_DHCP
141 #define CONFIG_BOOTP_DNS		/* Configurable parts of CMD_DHCP */
142 #define CONFIG_BOOTP_DNS2
143 #define CONFIG_BOOTP_SEND_HOSTNAME
144 #define CONFIG_BOOTP_GATEWAY
145 #define CONFIG_BOOTP_SUBNETMASK
146 #define CONFIG_NET_RETRY_COUNT		10
147 #define CONFIG_CMD_PING
148 #define CONFIG_CMD_MII
149 #define CONFIG_DRIVER_TI_CPSW		/* Driver for IP block */
150 #define CONFIG_MII			/* Required in net/eth.c */
151 #define CONFIG_PHY_GIGE			/* per-board part of CPSW */
152 #define CONFIG_PHYLIB
153 
154 /* SPI */
155 #undef	CONFIG_OMAP3_SPI
156 #define CONFIG_CMD_SF
157 #define CONFIG_CMD_SPI
158 #define CONFIG_TI_SPI_MMAP
159 #define CONFIG_SF_DEFAULT_SPEED                64000000
160 #define CONFIG_SF_DEFAULT_MODE                 SPI_MODE_0
161 #define CONFIG_QSPI_QUAD_SUPPORT
162 
163 #ifdef CONFIG_SPL_BUILD
164 #undef CONFIG_DM_SPI
165 #undef CONFIG_DM_SPI_FLASH
166 #endif
167 
168 /*
169  * Default to using SPI for environment, etc.
170  * 0x000000 - 0x010000 : QSPI.SPL (64KiB)
171  * 0x010000 - 0x020000 : QSPI.SPL.backup1 (64KiB)
172  * 0x020000 - 0x030000 : QSPI.SPL.backup2 (64KiB)
173  * 0x030000 - 0x040000 : QSPI.SPL.backup3 (64KiB)
174  * 0x040000 - 0x140000 : QSPI.u-boot (1MiB)
175  * 0x140000 - 0x1C0000 : QSPI.u-boot-spl-os (512KiB)
176  * 0x1C0000 - 0x1D0000 : QSPI.u-boot-env (64KiB)
177  * 0x1D0000 - 0x1E0000 : QSPI.u-boot-env.backup1 (64KiB)
178  * 0x1E0000 - 0x9E0000 : QSPI.kernel (8MiB)
179  * 0x9E0000 - 0x2000000 : USERLAND
180  */
181 #define CONFIG_SYS_SPI_KERNEL_OFFS	0x1E0000
182 #define CONFIG_SYS_SPI_ARGS_OFFS	0x140000
183 #define CONFIG_SYS_SPI_ARGS_SIZE	0x80000
184 #if defined(CONFIG_QSPI_BOOT)
185 /* In SPL, use the environment and discard MMC support for space. */
186 #ifdef CONFIG_SPL_BUILD
187 #undef CONFIG_SPL_MMC_SUPPORT
188 #undef CONFIG_SPL_MAX_SIZE
189 #define CONFIG_SPL_MAX_SIZE             (64 << 10) /* 64 KiB */
190 #endif
191 #define CONFIG_SPL_ENV_SUPPORT
192 #define CONFIG_ENV_IS_IN_SPI_FLASH
193 #define CONFIG_SYS_REDUNDAND_ENVIRONMENT
194 #define CONFIG_ENV_SPI_MAX_HZ           CONFIG_SF_DEFAULT_SPEED
195 #define CONFIG_ENV_SIZE			(64 << 10)
196 #define CONFIG_ENV_SECT_SIZE		(64 << 10) /* 64 KB sectors */
197 #define CONFIG_ENV_OFFSET		0x1C0000
198 #define CONFIG_ENV_OFFSET_REDUND	0x1D0000
199 #endif
200 
201 /* SPI SPL */
202 #define CONFIG_SPL_SPI_SUPPORT
203 #define CONFIG_SPL_DMA_SUPPORT
204 #define CONFIG_TI_EDMA3
205 #define CONFIG_SPL_SPI_LOAD
206 #define CONFIG_SPL_SPI_FLASH_SUPPORT
207 #define CONFIG_SYS_SPI_U_BOOT_OFFS     0x40000
208 
209 #define CONFIG_SUPPORT_EMMC_BOOT
210 
211 /* USB xHCI HOST */
212 #define CONFIG_CMD_USB
213 #define CONFIG_USB_HOST
214 #define CONFIG_USB_XHCI
215 #define CONFIG_USB_XHCI_DWC3
216 #define CONFIG_USB_XHCI_OMAP
217 #define CONFIG_USB_STORAGE
218 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 2
219 
220 #define CONFIG_OMAP_USB_PHY
221 #define CONFIG_OMAP_USB2PHY2_HOST
222 
223 /* USB GADGET */
224 #define CONFIG_USB_DWC3_PHY_OMAP
225 #define CONFIG_USB_DWC3_OMAP
226 #define CONFIG_USB_DWC3
227 #define CONFIG_USB_DWC3_GADGET
228 
229 #define CONFIG_USB_GADGET
230 #define CONFIG_USB_GADGET_DOWNLOAD
231 #define CONFIG_USB_GADGET_VBUS_DRAW 2
232 #define CONFIG_G_DNL_MANUFACTURER "Texas Instruments"
233 #define CONFIG_G_DNL_VENDOR_NUM 0x0451
234 #define CONFIG_G_DNL_PRODUCT_NUM 0xd022
235 #define CONFIG_USB_GADGET_DUALSPEED
236 
237 /* USB Device Firmware Update support */
238 #define CONFIG_USB_FUNCTION_DFU
239 #define CONFIG_DFU_RAM
240 #define CONFIG_CMD_DFU
241 
242 #define CONFIG_DFU_MMC
243 #define CONFIG_DFU_RAM
244 #define CONFIG_DFU_SF
245 
246 /* SATA */
247 #define CONFIG_BOARD_LATE_INIT
248 #define CONFIG_CMD_SCSI
249 #define CONFIG_LIBATA
250 #define CONFIG_SCSI_AHCI
251 #define CONFIG_SCSI_AHCI_PLAT
252 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	1
253 #define CONFIG_SYS_SCSI_MAX_LUN		1
254 #define CONFIG_SYS_SCSI_MAX_DEVICE	(CONFIG_SYS_SCSI_MAX_SCSI_ID * \
255 						CONFIG_SYS_SCSI_MAX_LUN)
256 
257 /* NAND support */
258 #ifdef CONFIG_NAND
259 /* NAND: device related configs */
260 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
261 #define CONFIG_SYS_NAND_OOBSIZE		64
262 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
263 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
264 #define CONFIG_SYS_NAND_PAGE_COUNT	(CONFIG_SYS_NAND_BLOCK_SIZE / \
265 					 CONFIG_SYS_NAND_PAGE_SIZE)
266 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
267 /* NAND: driver related configs */
268 #define CONFIG_NAND_OMAP_GPMC
269 #define CONFIG_NAND_OMAP_ELM
270 #define CONFIG_SYS_NAND_ONFI_DETECTION
271 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_BCH8_CODE_HW
272 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	NAND_LARGE_BADBLOCK_POS
273 #define CONFIG_SYS_NAND_ECCPOS		{ 2, 3, 4, 5, 6, 7, 8, 9, \
274 					 10, 11, 12, 13, 14, 15, 16, 17, \
275 					 18, 19, 20, 21, 22, 23, 24, 25, \
276 					 26, 27, 28, 29, 30, 31, 32, 33, \
277 					 34, 35, 36, 37, 38, 39, 40, 41, \
278 					 42, 43, 44, 45, 46, 47, 48, 49, \
279 					 50, 51, 52, 53, 54, 55, 56, 57, }
280 #define CONFIG_SYS_NAND_ECCSIZE		512
281 #define CONFIG_SYS_NAND_ECCBYTES	14
282 #define MTDIDS_DEFAULT			"nand0=nand.0"
283 #define MTDPARTS_DEFAULT		"mtdparts=nand.0:" \
284 					"128k(NAND.SPL)," \
285 					"128k(NAND.SPL.backup1)," \
286 					"128k(NAND.SPL.backup2)," \
287 					"128k(NAND.SPL.backup3)," \
288 					"256k(NAND.u-boot-spl-os)," \
289 					"1m(NAND.u-boot)," \
290 					"128k(NAND.u-boot-env)," \
291 					"128k(NAND.u-boot-env.backup1)," \
292 					"8m(NAND.kernel)," \
293 					"-(NAND.file-system)"
294 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x000c0000
295 /* NAND: SPL related configs */
296 #ifdef CONFIG_SPL_NAND_SUPPORT
297 #define CONFIG_SPL_NAND_AM33XX_BCH
298 #endif
299 /* NAND: SPL falcon mode configs */
300 #ifdef CONFIG_SPL_OS_BOOT
301 #define CONFIG_CMD_SPL_NAND_OFS		0x00080000 /* os-boot params*/
302 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS	0x00200000 /* kernel offset */
303 #define CONFIG_CMD_SPL_WRITE_SIZE	0x2000
304 #endif
305 #endif /* !CONFIG_NAND */
306 
307 /* Parallel NOR Support */
308 #if defined(CONFIG_NOR)
309 /* NOR: device related configs */
310 #define CONFIG_SYS_MAX_FLASH_SECT	512
311 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
312 #define CONFIG_SYS_FLASH_SIZE		(64 * 1024 * 1024) /* 64 MB */
313 /* #define CONFIG_INIT_IGNORE_ERROR */
314 #undef CONFIG_SYS_NO_FLASH
315 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE
316 #define CONFIG_SYS_FLASH_PROTECTION
317 #define CONFIG_SYS_FLASH_CFI
318 #define CONFIG_FLASH_CFI_DRIVER
319 #define CONFIG_FLASH_CFI_MTD
320 #define CONFIG_SYS_MAX_FLASH_BANKS	1
321 #define CONFIG_SYS_FLASH_BASE		(0x08000000)
322 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_FLASH_BASE
323 /* Reduce SPL size by removing unlikey targets */
324 #ifdef CONFIG_NOR_BOOT
325 #define CONFIG_ENV_IS_IN_FLASH
326 #define CONFIG_ENV_SECT_SIZE		(128 * 1024)	/* 128 KiB */
327 #define MTDIDS_DEFAULT			"nor0=physmap-flash.0"
328 #define MTDPARTS_DEFAULT		"mtdparts=physmap-flash.0:" \
329 					"128k(NOR.SPL)," \
330 					"128k(NOR.SPL.backup1)," \
331 					"128k(NOR.SPL.backup2)," \
332 					"128k(NOR.SPL.backup3)," \
333 					"256k(NOR.u-boot-spl-os)," \
334 					"1m(NOR.u-boot)," \
335 					"128k(NOR.u-boot-env)," \
336 					"128k(NOR.u-boot-env.backup1)," \
337 					"8m(NOR.kernel)," \
338 					"-(NOR.rootfs)"
339 #define CONFIG_ENV_OFFSET		0x001c0000
340 #define CONFIG_ENV_OFFSET_REDUND	0x001e0000
341 #endif
342 #endif  /* NOR support */
343 
344 #endif /* __CONFIG_DRA7XX_EVM_H */
345