1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * (C) Copyright 2009 8 * Frederik Kriewitz <frederik@kriewitz.eu> 9 * 10 * Configuration settings for the DevKit8000 board. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* High Level Configuration Options */ 19 #define CONFIG_OMAP3_DEVKIT8000 1 /* working with DevKit8000 */ 20 #define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000 21 22 /* 23 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 24 * 64 bytes before this address should be set aside for u-boot.img's 25 * header. That is 0x800FFFC0--0x80100000 should not be used for any 26 * other needs. 27 */ 28 #define CONFIG_SYS_TEXT_BASE 0x80100000 29 30 #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/ 31 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 32 33 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 34 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 35 36 #define CONFIG_NAND 37 38 /* Physical Memory Map */ 39 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 40 41 #include <configs/ti_omap3_common.h> 42 43 /* Display CPU and Board information */ 44 #define CONFIG_DISPLAY_CPUINFO 1 45 #define CONFIG_DISPLAY_BOARDINFO 1 46 47 #define CONFIG_MISC_INIT_R 48 49 #define CONFIG_REVISION_TAG 1 50 51 /* Size of malloc() pool */ 52 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 53 /* Sector */ 54 #undef CONFIG_SYS_MALLOC_LEN 55 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 56 57 /* Hardware drivers */ 58 /* DM9000 */ 59 #define CONFIG_NET_RETRY_COUNT 20 60 #define CONFIG_DRIVER_DM9000 1 61 #define CONFIG_DM9000_BASE 0x2c000000 62 #define DM9000_IO CONFIG_DM9000_BASE 63 #define DM9000_DATA (CONFIG_DM9000_BASE + 0x400) 64 #define CONFIG_DM9000_USE_16BIT 1 65 #define CONFIG_DM9000_NO_SROM 1 66 #undef CONFIG_DM9000_DEBUG 67 68 /* SPI */ 69 #undef CONFIG_SPI 70 #undef CONFIG_OMAP3_SPI 71 72 /* I2C */ 73 #undef CONFIG_SYS_I2C_OMAP24XX 74 #define CONFIG_SYS_I2C_OMAP34XX 75 76 /* TWL4030 */ 77 #define CONFIG_TWL4030_LED 1 78 79 /* Board NAND Info */ 80 #define MTDIDS_DEFAULT "nand0=nand" 81 #define MTDPARTS_DEFAULT "mtdparts=nand:" \ 82 "512k(x-loader)," \ 83 "1920k(u-boot)," \ 84 "128k(u-boot-env)," \ 85 "4m(kernel)," \ 86 "-(fs)" 87 88 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 89 /* to access nand */ 90 #define CONFIG_JFFS2_NAND 91 /* nand device jffs2 lives on */ 92 #define CONFIG_JFFS2_DEV "nand0" 93 /* start of jffs2 partition */ 94 #define CONFIG_JFFS2_PART_OFFSET 0x680000 95 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ 96 /* partition */ 97 98 /* commands to include */ 99 #define CONFIG_CMD_DHCP /* DHCP support */ 100 #define CONFIG_CMD_JFFS2 /* JFFS2 Support */ 101 #define CONFIG_CMD_NAND_LOCK_UNLOCK /* nand (un)lock commands */ 102 103 #undef CONFIG_CMD_SPI 104 #undef CONFIG_CMD_GPIO 105 #undef CONFIG_CMD_ASKENV 106 #undef CONFIG_CMD_BOOTZ 107 #undef CONFIG_SUPPORT_RAW_INITRD 108 #undef CONFIG_FAT_WRITE 109 #undef CONFIG_CMD_EXT4 110 #undef CONFIG_CMD_FS_GENERIC 111 112 /* BOOTP/DHCP options */ 113 #define CONFIG_BOOTP_SUBNETMASK 114 #define CONFIG_BOOTP_GATEWAY 115 #define CONFIG_BOOTP_HOSTNAME 116 #define CONFIG_BOOTP_NISDOMAIN 117 #define CONFIG_BOOTP_BOOTPATH 118 #define CONFIG_BOOTP_BOOTFILESIZE 119 #define CONFIG_BOOTP_DNS 120 #define CONFIG_BOOTP_DNS2 121 #define CONFIG_BOOTP_SEND_HOSTNAME 122 #define CONFIG_BOOTP_NTPSERVER 123 #define CONFIG_BOOTP_TIMEOFFSET 124 #undef CONFIG_BOOTP_VENDOREX 125 126 /* Environment information */ 127 #define CONFIG_EXTRA_ENV_SETTINGS \ 128 "loadaddr=0x82000000\0" \ 129 "console=ttyO2,115200n8\0" \ 130 "mmcdev=0\0" \ 131 "vram=12M\0" \ 132 "dvimode=1024x768MR-16@60\0" \ 133 "defaultdisplay=dvi\0" \ 134 "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \ 135 "kernelopts=rw\0" \ 136 "commonargs=" \ 137 "setenv bootargs console=${console} " \ 138 "vram=${vram} " \ 139 "omapfb.mode=dvi:${dvimode} " \ 140 "omapdss.def_disp=${defaultdisplay}\0" \ 141 "mmcargs=" \ 142 "run commonargs; " \ 143 "setenv bootargs ${bootargs} " \ 144 "root=/dev/mmcblk0p2 " \ 145 "rootwait " \ 146 "${kernelopts}\0" \ 147 "nandargs=" \ 148 "run commonargs; " \ 149 "setenv bootargs ${bootargs} " \ 150 "omapfb.mode=dvi:${dvimode} " \ 151 "omapdss.def_disp=${defaultdisplay} " \ 152 "root=/dev/mtdblock4 " \ 153 "rootfstype=jffs2 " \ 154 "${kernelopts}\0" \ 155 "netargs=" \ 156 "run commonargs; " \ 157 "setenv bootargs ${bootargs} " \ 158 "root=/dev/nfs " \ 159 "nfsroot=${serverip}:${rootpath},${nfsopts} " \ 160 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \ 161 "${kernelopts} " \ 162 "dnsip1=${dnsip} " \ 163 "dnsip2=${dnsip2}\0" \ 164 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 165 "bootscript=echo Running bootscript from mmc ...; " \ 166 "source ${loadaddr}\0" \ 167 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 168 "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \ 169 "mmcboot=echo Booting from mmc ...; " \ 170 "run mmcargs; " \ 171 "bootm ${loadaddr}\0" \ 172 "nandboot=echo Booting from nand ...; " \ 173 "run nandargs; " \ 174 "nand read ${loadaddr} 280000 400000; " \ 175 "bootm ${loadaddr}\0" \ 176 "netboot=echo Booting from network ...; " \ 177 "dhcp ${loadaddr}; " \ 178 "run netargs; " \ 179 "bootm ${loadaddr}\0" \ 180 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 181 "if run loadbootscript; then " \ 182 "run bootscript; " \ 183 "else " \ 184 "if run loaduimage; then " \ 185 "run mmcboot; " \ 186 "else run nandboot; " \ 187 "fi; " \ 188 "fi; " \ 189 "else run nandboot; fi\0" 190 191 192 #define CONFIG_BOOTCOMMAND "run autoboot" 193 194 /* Boot Argument Buffer Size */ 195 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000) 196 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 197 0x01000000) /* 16MB */ 198 199 /* NAND and environment organization */ 200 #define CONFIG_ENV_IS_IN_NAND 1 201 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 202 203 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 204 205 /* SRAM config */ 206 #define CONFIG_SYS_SRAM_START 0x40200000 207 #define CONFIG_SYS_SRAM_SIZE 0x10000 208 209 /* Defines for SPL */ 210 #undef CONFIG_SPL_MTD_SUPPORT 211 212 #undef CONFIG_SPL_TEXT_BASE 213 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 214 215 /* NAND boot config */ 216 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 217 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 218 #define CONFIG_SYS_NAND_PAGE_COUNT 64 219 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 220 #define CONFIG_SYS_NAND_OOBSIZE 64 221 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 222 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 223 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 224 10, 11, 12, 13} 225 226 #define CONFIG_SYS_NAND_ECCSIZE 512 227 #define CONFIG_SYS_NAND_ECCBYTES 3 228 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 229 230 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 231 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 232 233 /* SPL OS boot options */ 234 #define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */ 235 #define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\ 236 0x400000) 237 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 238 239 #undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 240 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 241 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 242 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */ 243 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */ 244 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */ 245 246 #undef CONFIG_SYS_SPL_ARGS_ADDR 247 #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100) 248 249 #endif /* __CONFIG_H */ 250