1 /* 2 * (C) Copyright 2006-2008 3 * Texas Instruments. 4 * Richard Woodruff <r-woodruff2@ti.com> 5 * Syed Mohammed Khasim <x0khasim@ti.com> 6 * 7 * (C) Copyright 2009 8 * Frederik Kriewitz <frederik@kriewitz.eu> 9 * 10 * Configuration settings for the DevKit8000 board. 11 * 12 * SPDX-License-Identifier: GPL-2.0+ 13 */ 14 15 #ifndef __CONFIG_H 16 #define __CONFIG_H 17 18 /* High Level Configuration Options */ 19 #define CONFIG_MACH_TYPE MACH_TYPE_DEVKIT8000 20 21 /* 22 * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM 23 * 64 bytes before this address should be set aside for u-boot.img's 24 * header. That is 0x800FFFC0--0x80100000 should not be used for any 25 * other needs. 26 */ 27 #define CONFIG_SYS_TEXT_BASE 0x80100000 28 29 #define CONFIG_SPL_BSS_START_ADDR 0x80000500 /* leave space for bootargs*/ 30 #define CONFIG_SPL_BSS_MAX_SIZE 0x80000 31 32 #define CONFIG_SYS_SPL_MALLOC_START 0x80208000 33 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x100000 /* 1 MB */ 34 35 #define CONFIG_NAND 36 37 /* Physical Memory Map */ 38 #define CONFIG_NR_DRAM_BANKS 2 /* CS1 may or may not be populated */ 39 40 #include <configs/ti_omap3_common.h> 41 42 #define CONFIG_MISC_INIT_R 43 44 #define CONFIG_REVISION_TAG 1 45 46 /* Size of malloc() pool */ 47 #define CONFIG_ENV_SIZE (128 << 10) /* 128 KiB */ 48 /* Sector */ 49 #undef CONFIG_SYS_MALLOC_LEN 50 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (128 << 10)) 51 52 /* Hardware drivers */ 53 /* DM9000 */ 54 #define CONFIG_NET_RETRY_COUNT 20 55 #define CONFIG_DRIVER_DM9000 1 56 #define CONFIG_DM9000_BASE 0x2c000000 57 #define DM9000_IO CONFIG_DM9000_BASE 58 #define DM9000_DATA (CONFIG_DM9000_BASE + 0x400) 59 #define CONFIG_DM9000_USE_16BIT 1 60 #define CONFIG_DM9000_NO_SROM 1 61 #undef CONFIG_DM9000_DEBUG 62 63 /* SPI */ 64 #undef CONFIG_SPI 65 #undef CONFIG_OMAP3_SPI 66 67 /* I2C */ 68 69 /* TWL4030 */ 70 #define CONFIG_TWL4030_LED 1 71 72 /* Board NAND Info */ 73 #define MTDIDS_DEFAULT "nand0=nand" 74 #define MTDPARTS_DEFAULT "mtdparts=nand:" \ 75 "512k(x-loader)," \ 76 "1920k(u-boot)," \ 77 "128k(u-boot-env)," \ 78 "4m(kernel)," \ 79 "-(fs)" 80 81 #define CONFIG_SYS_NAND_ADDR NAND_BASE /* physical address */ 82 /* to access nand */ 83 #define CONFIG_JFFS2_NAND 84 /* nand device jffs2 lives on */ 85 #define CONFIG_JFFS2_DEV "nand0" 86 /* start of jffs2 partition */ 87 #define CONFIG_JFFS2_PART_OFFSET 0x680000 88 #define CONFIG_JFFS2_PART_SIZE 0xf980000 /* size of jffs2 */ 89 /* partition */ 90 91 #undef CONFIG_SUPPORT_RAW_INITRD 92 93 /* BOOTP/DHCP options */ 94 #define CONFIG_BOOTP_SUBNETMASK 95 #define CONFIG_BOOTP_GATEWAY 96 #define CONFIG_BOOTP_HOSTNAME 97 #define CONFIG_BOOTP_NISDOMAIN 98 #define CONFIG_BOOTP_BOOTPATH 99 #define CONFIG_BOOTP_BOOTFILESIZE 100 #define CONFIG_BOOTP_DNS 101 #define CONFIG_BOOTP_DNS2 102 #define CONFIG_BOOTP_SEND_HOSTNAME 103 #define CONFIG_BOOTP_NTPSERVER 104 #define CONFIG_BOOTP_TIMEOFFSET 105 #undef CONFIG_BOOTP_VENDOREX 106 107 /* Environment information */ 108 #define CONFIG_EXTRA_ENV_SETTINGS \ 109 "loadaddr=0x82000000\0" \ 110 "console=ttyO2,115200n8\0" \ 111 "mmcdev=0\0" \ 112 "vram=12M\0" \ 113 "dvimode=1024x768MR-16@60\0" \ 114 "defaultdisplay=dvi\0" \ 115 "nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \ 116 "kernelopts=rw\0" \ 117 "commonargs=" \ 118 "setenv bootargs console=${console} " \ 119 "vram=${vram} " \ 120 "omapfb.mode=dvi:${dvimode} " \ 121 "omapdss.def_disp=${defaultdisplay}\0" \ 122 "mmcargs=" \ 123 "run commonargs; " \ 124 "setenv bootargs ${bootargs} " \ 125 "root=/dev/mmcblk0p2 " \ 126 "rootwait " \ 127 "${kernelopts}\0" \ 128 "nandargs=" \ 129 "run commonargs; " \ 130 "setenv bootargs ${bootargs} " \ 131 "omapfb.mode=dvi:${dvimode} " \ 132 "omapdss.def_disp=${defaultdisplay} " \ 133 "root=/dev/mtdblock4 " \ 134 "rootfstype=jffs2 " \ 135 "${kernelopts}\0" \ 136 "netargs=" \ 137 "run commonargs; " \ 138 "setenv bootargs ${bootargs} " \ 139 "root=/dev/nfs " \ 140 "nfsroot=${serverip}:${rootpath},${nfsopts} " \ 141 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \ 142 "${kernelopts} " \ 143 "dnsip1=${dnsip} " \ 144 "dnsip2=${dnsip2}\0" \ 145 "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \ 146 "bootscript=echo Running bootscript from mmc ...; " \ 147 "source ${loadaddr}\0" \ 148 "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \ 149 "eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \ 150 "mmcboot=echo Booting from mmc ...; " \ 151 "run mmcargs; " \ 152 "bootm ${loadaddr}\0" \ 153 "nandboot=echo Booting from nand ...; " \ 154 "run nandargs; " \ 155 "nand read ${loadaddr} 280000 400000; " \ 156 "bootm ${loadaddr}\0" \ 157 "netboot=echo Booting from network ...; " \ 158 "dhcp ${loadaddr}; " \ 159 "run netargs; " \ 160 "bootm ${loadaddr}\0" \ 161 "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \ 162 "if run loadbootscript; then " \ 163 "run bootscript; " \ 164 "else " \ 165 "if run loaduimage; then " \ 166 "run mmcboot; " \ 167 "else run nandboot; " \ 168 "fi; " \ 169 "fi; " \ 170 "else run nandboot; fi\0" 171 172 #define CONFIG_BOOTCOMMAND "run autoboot" 173 174 /* Boot Argument Buffer Size */ 175 #define CONFIG_SYS_MEMTEST_START (OMAP34XX_SDRC_CS0 + 0x07000000) 176 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \ 177 0x01000000) /* 16MB */ 178 179 /* NAND and environment organization */ 180 #define SMNAND_ENV_OFFSET 0x260000 /* environment starts here */ 181 182 #define CONFIG_ENV_OFFSET SMNAND_ENV_OFFSET 183 184 /* SRAM config */ 185 #define CONFIG_SYS_SRAM_START 0x40200000 186 #define CONFIG_SYS_SRAM_SIZE 0x10000 187 188 /* Defines for SPL */ 189 190 #undef CONFIG_SPL_TEXT_BASE 191 #define CONFIG_SPL_TEXT_BASE 0x40200000 /*CONFIG_SYS_SRAM_START*/ 192 193 /* NAND boot config */ 194 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT 195 #define CONFIG_SYS_NAND_5_ADDR_CYCLE 196 #define CONFIG_SYS_NAND_PAGE_COUNT 64 197 #define CONFIG_SYS_NAND_PAGE_SIZE 2048 198 #define CONFIG_SYS_NAND_OOBSIZE 64 199 #define CONFIG_SYS_NAND_BLOCK_SIZE (128*1024) 200 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0 201 #define CONFIG_SYS_NAND_ECCPOS {2, 3, 4, 5, 6, 7, 8, 9,\ 202 10, 11, 12, 13} 203 204 #define CONFIG_SYS_NAND_ECCSIZE 512 205 #define CONFIG_SYS_NAND_ECCBYTES 3 206 #define CONFIG_NAND_OMAP_ECCSCHEME OMAP_ECC_HAM1_CODE_HW 207 208 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x80000 209 #define CONFIG_SYS_NAND_U_BOOT_SIZE 0x200000 210 211 /* SPL OS boot options */ 212 #define CONFIG_CMD_SPL_WRITE_SIZE 0x400 /* 1024 byte */ 213 #define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\ 214 0x400000) 215 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000 216 217 #undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 218 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 219 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 220 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR 0x500 /* address 0xa0000 */ 221 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x8 /* address 0x1000 */ 222 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 8 /* 4KB */ 223 224 #undef CONFIG_SYS_SPL_ARGS_ADDR 225 #define CONFIG_SYS_SPL_ARGS_ADDR (PHYS_SDRAM_1 + 0x100) 226 227 #endif /* __CONFIG_H */ 228