xref: /openbmc/u-boot/include/configs/devkit8000.h (revision 86277339)
1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * (C) Copyright 2009
8  * Frederik Kriewitz <frederik@kriewitz.eu>
9  *
10  * Configuration settings for the DevKit8000 board.
11  *
12  * SPDX-License-Identifier:	GPL-2.0+
13  */
14 
15 #ifndef __CONFIG_H
16 #define __CONFIG_H
17 
18 /* High Level Configuration Options */
19 #define CONFIG_MACH_TYPE	MACH_TYPE_DEVKIT8000
20 
21 /*
22  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
23  * 64 bytes before this address should be set aside for u-boot.img's
24  * header. That is 0x800FFFC0--0x80100000 should not be used for any
25  * other needs.
26  */
27 #define CONFIG_SYS_TEXT_BASE	0x80100000
28 
29 #define CONFIG_SPL_BSS_START_ADDR       0x80000500 /* leave space for bootargs*/
30 #define CONFIG_SPL_BSS_MAX_SIZE		0x80000
31 
32 #define CONFIG_SYS_SPL_MALLOC_START	0x80208000
33 #define CONFIG_SYS_SPL_MALLOC_SIZE	0x100000	/* 1 MB */
34 
35 #define CONFIG_NAND
36 
37 /*  Physical Memory Map  */
38 #define CONFIG_NR_DRAM_BANKS		2 /* CS1 may or may not be populated */
39 
40 #include <configs/ti_omap3_common.h>
41 
42 #define CONFIG_MISC_INIT_R
43 
44 #define CONFIG_REVISION_TAG		1
45 
46 /* Size of malloc() pool */
47 #define CONFIG_ENV_SIZE			(128 << 10)	/* 128 KiB */
48 						/* Sector */
49 #undef CONFIG_SYS_MALLOC_LEN
50 #define CONFIG_SYS_MALLOC_LEN		(CONFIG_ENV_SIZE + (128 << 10))
51 
52 /* Hardware drivers */
53 /* DM9000 */
54 #define CONFIG_NET_RETRY_COUNT		20
55 #define	CONFIG_DRIVER_DM9000		1
56 #define	CONFIG_DM9000_BASE		0x2c000000
57 #define	DM9000_IO			CONFIG_DM9000_BASE
58 #define	DM9000_DATA			(CONFIG_DM9000_BASE + 0x400)
59 #define	CONFIG_DM9000_USE_16BIT		1
60 #define CONFIG_DM9000_NO_SROM		1
61 #undef	CONFIG_DM9000_DEBUG
62 
63 /* SPI */
64 #undef CONFIG_SPI
65 #undef CONFIG_OMAP3_SPI
66 
67 /* I2C */
68 #undef CONFIG_SYS_I2C_OMAP24XX
69 #define CONFIG_SYS_I2C_OMAP34XX
70 
71 /* TWL4030 */
72 #define CONFIG_TWL4030_LED		1
73 
74 /* Board NAND Info */
75 #define MTDIDS_DEFAULT			"nand0=nand"
76 #define MTDPARTS_DEFAULT		"mtdparts=nand:" \
77 						"512k(x-loader)," \
78 						"1920k(u-boot)," \
79 						"128k(u-boot-env)," \
80 						"4m(kernel)," \
81 						"-(fs)"
82 
83 #define CONFIG_SYS_NAND_ADDR		NAND_BASE	/* physical address */
84 							/* to access nand */
85 #define CONFIG_JFFS2_NAND
86 /* nand device jffs2 lives on */
87 #define CONFIG_JFFS2_DEV		"nand0"
88 /* start of jffs2 partition */
89 #define CONFIG_JFFS2_PART_OFFSET	0x680000
90 #define CONFIG_JFFS2_PART_SIZE		0xf980000	/* size of jffs2 */
91 							/* partition */
92 
93 /* commands to include */
94 #define CONFIG_CMD_NAND_LOCK_UNLOCK	/* nand (un)lock commands	*/
95 
96 #undef CONFIG_SUPPORT_RAW_INITRD
97 
98 /* BOOTP/DHCP options */
99 #define CONFIG_BOOTP_SUBNETMASK
100 #define CONFIG_BOOTP_GATEWAY
101 #define CONFIG_BOOTP_HOSTNAME
102 #define CONFIG_BOOTP_NISDOMAIN
103 #define CONFIG_BOOTP_BOOTPATH
104 #define CONFIG_BOOTP_BOOTFILESIZE
105 #define CONFIG_BOOTP_DNS
106 #define CONFIG_BOOTP_DNS2
107 #define CONFIG_BOOTP_SEND_HOSTNAME
108 #define CONFIG_BOOTP_NTPSERVER
109 #define CONFIG_BOOTP_TIMEOFFSET
110 #undef CONFIG_BOOTP_VENDOREX
111 
112 /* Environment information */
113 #define CONFIG_EXTRA_ENV_SETTINGS \
114 	"loadaddr=0x82000000\0" \
115 	"console=ttyO2,115200n8\0" \
116 	"mmcdev=0\0" \
117 	"vram=12M\0" \
118 	"dvimode=1024x768MR-16@60\0" \
119 	"defaultdisplay=dvi\0" \
120 	"nfsopts=hard,tcp,rsize=65536,wsize=65536\0" \
121 	"kernelopts=rw\0" \
122 	"commonargs=" \
123 		"setenv bootargs console=${console} " \
124 		"vram=${vram} " \
125 		"omapfb.mode=dvi:${dvimode} " \
126 		"omapdss.def_disp=${defaultdisplay}\0" \
127 	"mmcargs=" \
128 		"run commonargs; " \
129 		"setenv bootargs ${bootargs} " \
130 		"root=/dev/mmcblk0p2 " \
131 		"rootwait " \
132 		"${kernelopts}\0" \
133 	"nandargs=" \
134 		"run commonargs; " \
135 		"setenv bootargs ${bootargs} " \
136 		"omapfb.mode=dvi:${dvimode} " \
137 		"omapdss.def_disp=${defaultdisplay} " \
138 		"root=/dev/mtdblock4 " \
139 		"rootfstype=jffs2 " \
140 		"${kernelopts}\0" \
141 	"netargs=" \
142 		"run commonargs; " \
143 		"setenv bootargs ${bootargs} " \
144 		"root=/dev/nfs " \
145 		"nfsroot=${serverip}:${rootpath},${nfsopts} " \
146 		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off " \
147 		"${kernelopts} " \
148 		"dnsip1=${dnsip} " \
149 		"dnsip2=${dnsip2}\0" \
150 	"loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
151 	"bootscript=echo Running bootscript from mmc ...; " \
152 		"source ${loadaddr}\0" \
153 	"loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
154 	"eraseenv=nand unlock 0x260000 0x20000; nand erase 0x260000 0x20000\0" \
155 	"mmcboot=echo Booting from mmc ...; " \
156 		"run mmcargs; " \
157 		"bootm ${loadaddr}\0" \
158 	"nandboot=echo Booting from nand ...; " \
159 		"run nandargs; " \
160 		"nand read ${loadaddr} 280000 400000; " \
161 		"bootm ${loadaddr}\0" \
162 	"netboot=echo Booting from network ...; " \
163 		"dhcp ${loadaddr}; " \
164 		"run netargs; " \
165 		"bootm ${loadaddr}\0" \
166 	"autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
167 			"if run loadbootscript; then " \
168 				"run bootscript; " \
169 			"else " \
170 				"if run loaduimage; then " \
171 					"run mmcboot; " \
172 				"else run nandboot; " \
173 				"fi; " \
174 			"fi; " \
175 		"else run nandboot; fi\0"
176 
177 #define CONFIG_BOOTCOMMAND "run autoboot"
178 
179 /* Boot Argument Buffer Size */
180 #define CONFIG_SYS_MEMTEST_START	(OMAP34XX_SDRC_CS0 + 0x07000000)
181 #define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
182 					0x01000000) /* 16MB */
183 
184 /* NAND and environment organization  */
185 #define CONFIG_ENV_IS_IN_NAND		1
186 #define SMNAND_ENV_OFFSET		0x260000 /* environment starts here */
187 
188 #define CONFIG_ENV_OFFSET		SMNAND_ENV_OFFSET
189 
190 /* SRAM config */
191 #define CONFIG_SYS_SRAM_START              0x40200000
192 #define CONFIG_SYS_SRAM_SIZE               0x10000
193 
194 /* Defines for SPL */
195 
196 #undef CONFIG_SPL_TEXT_BASE
197 #define CONFIG_SPL_TEXT_BASE		0x40200000 /*CONFIG_SYS_SRAM_START*/
198 
199 /* NAND boot config */
200 #define CONFIG_SYS_NAND_BUSWIDTH_16BIT
201 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
202 #define CONFIG_SYS_NAND_PAGE_COUNT	64
203 #define CONFIG_SYS_NAND_PAGE_SIZE	2048
204 #define CONFIG_SYS_NAND_OOBSIZE		64
205 #define CONFIG_SYS_NAND_BLOCK_SIZE	(128*1024)
206 #define CONFIG_SYS_NAND_BAD_BLOCK_POS	0
207 #define CONFIG_SYS_NAND_ECCPOS		{2, 3, 4, 5, 6, 7, 8, 9,\
208 						10, 11, 12, 13}
209 
210 #define CONFIG_SYS_NAND_ECCSIZE		512
211 #define CONFIG_SYS_NAND_ECCBYTES	3
212 #define CONFIG_NAND_OMAP_ECCSCHEME	OMAP_ECC_HAM1_CODE_HW
213 
214 #define CONFIG_SYS_NAND_U_BOOT_OFFS	0x80000
215 #define CONFIG_SYS_NAND_U_BOOT_SIZE	0x200000
216 
217 /* SPL OS boot options */
218 #define CONFIG_CMD_SPL_WRITE_SIZE       0x400 /* 1024 byte */
219 #define CONFIG_CMD_SPL_NAND_OFS (CONFIG_SYS_NAND_SPL_KERNEL_OFFS+\
220 					0x400000)
221 #define CONFIG_SYS_NAND_SPL_KERNEL_OFFS 0x280000
222 
223 #undef CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR
224 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR
225 #undef CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS
226 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x500 /* address 0xa0000 */
227 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x8   /* address 0x1000 */
228 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	8     /* 4KB */
229 
230 #undef CONFIG_SYS_SPL_ARGS_ADDR
231 #define CONFIG_SYS_SPL_ARGS_ADDR        (PHYS_SDRAM_1 + 0x100)
232 
233 #endif /* __CONFIG_H */
234